• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design & IC Packaging (Allegro X)

PCB Design & IC Packaging (Allegro X)

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

  • Leaderboard

    PCB Design

    • 1
      oldmouldy
      oldmouldy 55 Points
    • 2
      steve
      steve 45 Points
    • 2
      MZ20250602835
      MZ20250602835 45 Points
    • 4
      RJ202412171240
      RJ202412171240 25 Points
    • 5
      JL202601056745
      JL202601056745 20 Points
  • Leaderboard

    PCB Design

    • 1
      steve
      steve 15,868 Points
    • 2
      oldmouldy
      oldmouldy 11,055 Points
    • 3
      eDave
      eDave 7,596 Points
    • 4
      DavidJHutchins
      DavidJHutchins 5,226 Points
    • 5
      redwire
      redwire 5,138 Points

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List

Latest Posts

  • Answered

    How to tile schematic windows in Orcad X.

    Category: Allegro X Capture CIS

    By DH202507237422

    •

    updated 3 months ago by msenick

    3 replies • 1623 views
  • Answered

    Troubleshooting Missing Voltage Sources in Netlists

    Category: Allegro X Capture CIS

    By LC202506035949

    •

    updated 3 months ago by HH20250923150

    3 replies • 1815 views
  • Answered

    mapping Not connected pins in symbol editor and PSPICE model association

    Category: Allegro X Capture CIS

    By eddoh

    •

    updated 3 months ago by eddoh

    4 replies • 2615 views
  • Suggested Answer

    Possible to Tile Schematic Pages in Orcad X Professional

    Category: Allegro X Capture CIS

    By msenick

    •

    updated 3 months ago by JCTEYSSIER0

    11 replies • 4446 views
  • Not Answered

    How to get superimposition of impulse with double exponential decaying sine waveform

    Category: PSpice

    By KM202509171147

    •

    updated 3 months ago by IshaS

    1 replies • 1003 views
  • Not Answered

    Cadence PCB Viewer silent install commands

    Category: Licensing and Installation

    By JA202509165115

    •

    updated 3 months ago by JA202509165115

    2 replies • 1169 views
  • Answered

    Need Help with Code to find Package to Place Keepout DRC's

    Category: Allegro X Scripting - Skill

    By MarkGorecki

    •

    updated 3 months ago by MarkGorecki

    4 replies • 1706 views
  • Answered

    How to avoid mapping non-connected pins to PSPICE models?

    Category: Allegro X Capture CIS

    By eddoh

    •

    updated 3 months ago by rg13

    1 replies • 1046 views
  • Not Answered

    Need a pcb layout review for common mistake

    Category: Allegro X PCB Editor

    By HASAN2024

    •

    updated 3 months ago by HASAN2024

    2 replies • 2102 views
  • Suggested Answer

    Error on startup axlcore.cxt

    Category: Allegro X PCB Editor

    By Sagetech

    •

    updated 3 months ago by Sagetech

    2 replies • 2443 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information