• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design & IC Packaging (Allegro X)

PCB Design & IC Packaging (Allegro X)

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

  • Leaderboard

    PCB Design

    • 1
      KS202606109251
      KS202606109251 85 Points
    • 2
      Electro Node
      Electro Node 32 Points
    • 3
      BC202603263145
      BC202603263145 27 Points
    • 3
      CF202606104231
      CF202606104231 27 Points
    • 5
      JR202606119023
      JR202606119023 20 Points
  • Leaderboard

    PCB Design

    • 1
      steve
      steve 15,558 Points
    • 2
      oldmouldy
      oldmouldy 10,790 Points
    • 3
      eDave
      eDave 7,341 Points
    • 4
      DavidJHutchins
      DavidJHutchins 5,231 Points
    • 5
      redwire
      redwire 4,428 Points

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List

Latest Posts

  • Discussion

    component model file in SKILL

    Category: Allegro X PCB Editor

    By archive

    •

    started over 19 years ago

    0 replies • 13661 views
  • Discussion

    how to do SKILL programming

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    2 replies • 14655 views
  • Discussion

    how to create logo to the Allegro's control panel

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    2 replies • 1457 views
  • Discussion

    Negative art layer files issue

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    10 replies • 18052 views
  • Discussion

    Globally adding a property

    Category: PCB Design

    By archive

    •

    started over 19 years ago

    0 replies • 13765 views
  • Discussion

    NO_TEST Property

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    2 replies • 14387 views
  • Discussion

    making a logo for placement on a pcb

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    12 replies • 24472 views
  • Discussion

    Netlisting mechanical parts from Capture CIS to Allegro

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    4 replies • 16174 views
  • Discussion

    How to get the padstack's informations?

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    4 replies • 2232 views
  • Discussion

    How to make use of design partition ?

    Category: PCB Design

    By archive

    •

    updated over 19 years ago by archive

    3 replies • 15309 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information