• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design & IC Packaging (Allegro X)

PCB Design & IC Packaging (Allegro X)

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

  • Leaderboard

    PCB Design

    • 1
      steve
      steve 20 Points
    • 1
      excellon1
      excellon1 20 Points
    • 3
      HirokiJEM
      HirokiJEM 16 Points
    • 4
      Robert Finley
      Robert Finley 15 Points
    • 4
      oldmouldy
      oldmouldy 15 Points
  • Leaderboard

    PCB Design

    • 1
      steve
      steve 15,898 Points
    • 2
      oldmouldy
      oldmouldy 11,050 Points
    • 3
      eDave
      eDave 7,661 Points
    • 4
      DavidJHutchins
      DavidJHutchins 5,226 Points
    • 5
      redwire
      redwire 5,193 Points

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List

Latest Posts

  • Discussion

    EBD file simulation

    Category: PCB Design

    By archive

    •

    updated over 20 years ago by archive

    2 replies • 14980 views
  • Discussion

    i am new to SI

    Category: PCB Design

    By archive

    •

    updated over 20 years ago by archive

    1 replies • 13125 views
  • Discussion

    iml to spice

    Category: PCB Design

    By archive

    •

    updated over 20 years ago by archive

    1 replies • 13827 views
  • Discussion

    Text font symbols

    Category: PCB Design

    By archive

    •

    updated over 20 years ago by archive

    7 replies • 18581 views
  • Discussion

    Valor text Fonts

    Category: PCB Design

    By archive

    •

    updated over 20 years ago by archive

    1 replies • 13426 views
  • Discussion

    ghz simulation

    Category: PCB Design

    By archive

    •

    updated over 20 years ago by archive

    2 replies • 13668 views
  • Discussion

    Masking vias not used as test points

    Category: PCB Design

    By archive

    •

    updated over 20 years ago by archive

    4 replies • 14092 views
  • Discussion

    Verifying schedule

    Category: PCB Design

    By archive

    •

    updated over 20 years ago by archive

    1 replies • 13728 views
  • Discussion

    User defined Attributes

    Category: PCB Design

    By archive

    •

    updated over 20 years ago by archive

    4 replies • 14405 views
  • Discussion

    How to compare a flatten schematic netlist to a hierarchy one

    Category: PCB Design

    By archive

    •

    updated over 20 years ago by archive

    1 replies • 13752 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information