• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design & IC Packaging (Allegro X)

PCB Design & IC Packaging (Allegro X)

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

  • Leaderboard

    PCB Design

    • 1
      ltoohey
      ltoohey 66 Points
    • 2
      MZ20250602835
      MZ20250602835 62 Points
    • 3
      steve
      steve 45 Points
    • 3
      JCTEYSSIER0
      JCTEYSSIER0 45 Points
    • 5
      Robert Finley
      Robert Finley 40 Points
  • Leaderboard

    PCB Design

    • 1
      steve
      steve 15,848 Points
    • 2
      oldmouldy
      oldmouldy 10,995 Points
    • 3
      eDave
      eDave 7,566 Points
    • 4
      DavidJHutchins
      DavidJHutchins 5,236 Points
    • 5
      redwire
      redwire 5,103 Points

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List

Latest Posts

  • Discussion

    Disable ratsnest during routing.

    Category: PCB Design

    By Lennie

    •

    updated over 10 years ago by Lennie

    2 replies • 15650 views
  • Discussion

    cannot unfix certain vias.

    Category: PCB Design

    By Lennie

    •

    updated over 10 years ago by B Bruekers

    1 replies • 13747 views
  • Discussion

    Pads with Rounded Corners

    Category: PCB Design

    By Mahiman

    •

    updated over 10 years ago by B Bruekers

    3 replies • 14530 views
  • Discussion

    IBIS to DML Error

    Category: PCB Design

    By maine

    •

    started over 10 years ago

    0 replies • 13018 views
  • Discussion

    angle between trace and pad

    Category: PCB Design

    By Waltoon

    •

    updated over 10 years ago by jch teyssier

    3 replies • 14286 views
  • Discussion

    Adding layers to a board design

    Category: PCB Design

    By Mahiman

    •

    updated over 10 years ago by Mahiman

    2 replies • 14630 views
  • Discussion

    cadence skill code library?

    Category: Allegro X PCB Editor

    By jwhend

    •

    updated over 10 years ago by jwhend

    2 replies • 15254 views
  • Discussion

    Delay Tunning Differential Lines, propagation times don't appear in Constraint Manager

    Category: PCB Design

    By ifaeOscar

    •

    updated over 10 years ago by ifaeOscar

    9 replies • 3815 views
  • Discussion

    DE HDL Component Browser - Limit Library Cells shown to only those used in ptf file

    Category: PCB Design

    By ottodude125

    •

    started over 10 years ago

    0 replies • 629 views
  • Discussion

    I would like to edit a macro created in ORCAD Capture

    Category: PCB Design

    By eigendamper

    •

    updated over 10 years ago by eigendamper

    2 replies • 15598 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information