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Featured

When AI Becomes Part of Your Analog Design Workflow

If you design analog or mixed-signal circuits, each silicon generation asks you to…

Corporate
• 6 min read
Virtuoso AI Studio , featured , agentic ai , IP Catalog , analog design

Virtuoso Studio IC25.1 ISR8 Now Available

Virtuoso Studio IC25.1 ISR8 production release is now available for download.

Virtuoso Release Team
• 5 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog

Analog Design Migration Made Easy With Migration Cockpit

Analog IP remains one of the most valuable and difficult-to-scale assets in semiconductor…

Vinod Khera
• 5 min read
featured , analog IP , Automated test bench migration , parasitic aware optimization , Front to back Analog Migration
Analog/Custom Design
Latest blogs

Automatically Reusing an SoC Testbench in AMS IP Verification

The complexity and size of mixed-signal designs in wireless, power management, automotive…

• 1 min read
AMS , mixed signal design , mixed-signal methodology , mixed signal solution , analog , Mixed-Signal , analog/mixed-signal , Virtuoso environment , mixed-signal verification

Virtuosity: From Hatchlings to Fledglings to a Flock of Birds Blogging Together

“The reason birds can fly and we can't is simply because they have perfect faith…

• 2 min read
Cadence blogs , Virtuoso , RF design , Virtuosity , Virtuoso Video Diary , CPG Technical Communications Engineering

Virtuosity: SKILLful Virtuoso Visualization and Analysis

If you’re a SKILL enthusiast, you’ll be happy to know that the latest IC6.1.7 ISR…

• 4 min read
Analog Design Environment , ViVa-XL , custom/analog , Analog Simulation , SKILL for the Skilled , ADE , Virtuoso , ViVA , Virtuosity , Custom IC Design , SKILL , Cusstom IC Design

Virtuosity: Can I Graphically Edit Width Spacing Patterns?

We have enhanced the editing modes available for WSPs. In addition to the text-based…

• 1 min read
Routing , Advanced Node , width spacing patterns , Layout , Virtuoso , Virtuosity , Custom IC Design

Virtuosity: Can I Plot Signals with Different Axis Units in the Same Window?

Have you been frustrated trying to drag signals around in Virtuoso Visualization…

• 1 min read
virtuoso visualization and analysis , Virtuoso Analog Design Environment , Analog Design Environment , ViVA

Virtuosity: CDNLive India—Our Window to KYC!

In line with the recently-implemented mandate in India requiring banks and financial…

• 1 min read
CDNLive India 2017 , Cadence Help Future , Virtuosity , Virtuoso Video Diary , Cadence Help 3.0

Virtuosity: Organizing Waveform Families

When plotting waveforms in Virtuoso Visualization and Analysis across sweeps you…

• 2 min read
ADE GXL , ADE Explorer , ADE XL , ADE , Virtuoso Analog Design Environment , Analog Design Environment , ViVA , Virtuosity , ADE Assembler

Dealing with AOCVs in SRAMs

Systems on Chip, or SoCs as they’re more commonly called, have become increasingly…

• 4 min read
legato , custom/analog , Monte Carlo analysis , Monte Carlo , Spectre , Custom IC Design , Custom IC

Virtuosity: All New XStream In - The Translation Expressway

A layout design has to go through several iterations and multiple data exchanges…

• 6 min read
xstream in , design data translator , xstream in import , eda import

Art of Analog Design Part 7: Mismatch Tuning

In days of future past, we looked at DC mismatch analysis and compared it to Monte…

• 4 min read
mismatch tuning , Monte Carlo analysis , DC Mismatch

Simplifying the Memory Design Process

On today’s SOC designs, the memory control logics and memory arrays take up a lot…

• 2 min read
Memory , custom/analog , Spectre , Custom IC Design , Custom IC

Virtuosity: Read Mode Done Right

Because of the ease with which you can set up complex sweep, corner and Monte Carlo…

• 4 min read
ADE Explorer , Custom IC Design. Read only , ADE , Analog Design Environment , ADE Assembler

The Art of Analog Design Part 6: Response to Frank’s Question to Part 4

In the comments to blog #4, Frank Wiedmann asked about the correlation between the…

• 3 min read
spectre aps , Virtuoso Variation Option , ADE Explorer , mismatch analysis , Analog Simulation , Monte Carlo analysis , DC Mismatch , Custom IC Design

The Art of Analog Design Part 4: Mismatch Analysis

In Part 3 , we started to explore how to analyze the results of Monte Carlo analysis…

• 3 min read
spectre aps , Analog Design Environment , Virtuoso Variation Option , mismatch analysis , Analog Simulation , Monte Carlo , Custom IC Design

The Art of Analog Design Part 5: Mismatch Analysis II

In Part 4 of the series, we looked at applying mismatch analysis as a design tool…

• 3 min read
spectre aps , offset voltage , mismatch analysis , Analog Simulation , ADE , Monte Carlo analysis , Strong Arm latch , dynamic comparator

Virtuosity: Can I Speed up My Plots?

If your Virtuoso ® ADE Assembler, Virtuoso ® ADE Explorer or Virtuoso ® ADE XL setup…

• 3 min read
Analog Design Environment , ADE GXL , ADE Explorer , Explorer , ADE XL , analog , license , ADE , Mixed-Signal , Virtuoso Analog Design Environment , Virtuoso , ADE-GXL , Analog Design Environment , ViVA , ADE-XL , Virtuosity , mixed signal , Custom IC Design , ADE Assembler

Virtuosity: Power Filtering!

Finally, we have filters in the Corners Setup form, Results tab, Outputs tab, Data…

• 2 min read
Analog Design Environment , ADE Explorer , Filtering , ADE , Virtuoso Analog Design Environment , Analog Design Environment , ADE Assembler

The Art of Analog Design: Part 3, Monte Carlo Sampling

In Part 2, we looked at Monte Carlo sampling methods. In Part 3, we will consider…

• 4 min read
Analog Design Environment , APS , ADE Explorer , Analog Simulation , analog , ADE , Monte Carlo , Analog Design Environment , ViVA , ADE Assembler , Cusstom IC Design

Virtuosity: Sweeping Multiple DSPF Views in ADE

Wouldn't it be great if you could have a view for your DSPF files and sweep them…

• 3 min read
Analog Design Environment , ViVa-XL , custom/analog , ADE Explorer , Analog Simulation , DSPF , ADE , Block-level simulation , Virtuoso Analog Design Environment , Analog Design Environment , Schematic Editor , ViVA , Virtuosity , Circuit Design , Custom IC Design , Schematic , ADE Assembler

Virtuosity: Sweeping Multiple Config Views

Before IC6.1.7 ISR10, you could sweep multiple views in ADE for only one block in…

• 2 min read
Analog Design Environment , ADE Explorer , Explorer , Analog Simulation , ADE , Virtuoso Analog Design Environment , Analog Design Environment , Schematic Editor , Virtuosity , Circuit Design , Custom IC Design , Schematic , ADE Assembler

Virtuosity: What Color is Your Virtuoso Wearing Today?

Like you, Virtuoso can dress in a different color too every day. Interested to know…

• 3 min read
Customize Virtuoso , Virtuoso Editor , color , color-aware design , Virtuosity , Custom IC

Virtuosity: Driving Along a Longer Route May Take You Home Sooner!

On my way back home every day, I need to make a decision — should I drive less, or…

• 4 min read
library manager , Virtuoso , Virtuosity , physConfig , CPH , copy library , Custom IC

Virtuosity: Saving, Loading and Sharing ADE Annotation Settings

The whole ADE annotation flow was overhauled way back in IC6.1.6 but at that time…

• 4 min read
ADE Explorer , Annotation Settings , ADE Annotations , ADE , Analog Design Environment , Schematic Editor , Virtuosity , Schematic , ADE Assembler , annotation setup

Virtuoso Video Diary: What Are Parametric Sets?

Over the past few IC6.1.7 and ICADV12.3 ISR releases, a lot of new and useful features…

• 4 min read
Analog Design Environment , ADE Explorer , Explorer , analog , ADE , Mixed-Signal , Virtuoso Analog Design Environment , Virtuoso , Analog Design Environment , Virtuoso Video Diary , Circuit Design , mixed signal , Custom IC Design , Assembler , custom design technology , ADE Assembler , Cusstom IC Design

Photonics Summit and Workshop 2017

Interested in learning about system-level integration of electronic/photonic devices…

FormerMember • 1 min read
Phoenix , Lumerical , Photonics Summit , photonics , Custom IC Design

The Art of Analog Design Part 2: Monte Carlo Sampling

Historically, one of the great challenges that analog and mixed-designers face has…

• 9 min read
Interval of Confidence , Monte Carlo with auto-stop , confidence level , Low Discrepancy Sampling , Clopper-Pearson , Pelgrom’s Law , Monte Carlo analysis , Latin Hypercube Sampling

The Art of Analog Design Part 1: Overview of Variation-Aware and Robust Design

In this series, we will focus on advanced concepts for custom IC design, in particular…

• 2 min read
spectre aps , robust design , variation aware design , Virtuoso Analog Design Environment , vad

Virtuoso Video Diary: Comparing Waveform Outputs of Analog Simulations

Comparing waveform outputs of a simulation run with the outputs of a “golden“ or…

• 4 min read
Analog Design Environment , ADE , Analog Design Environment , Virtuoso Video Diary , Assembler , ADE Assembler
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