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VoltusTM IC Power Integrity Solution is a power integrity and analysis signoff solution that is integrated with the full suite of design implementation and signoff tools of Cadence to deliver the industry’s fastest design closure flow. The aim of this blog series is to broadcast the voices of different experts on how design engineers can effectively use the diverse Voltus technologies to achieve high-performance, accuracy, and capacity for next-gen chip designs.
Today’s commercial aircraft are marvels of aviation technologies. We joke about pilots sitting idly in the cockpit while the ‘fly-by-wire’ system takes control of the flying. But that is far from the truth: the captain and co-pilot are still very much in charge, taking the crucial decisions that keep the flight on path. There is a massive amount of data that pilots must quickly analyze and filter to decide on each maneuver—monitoring of altitude, engine power, wing flaps, wind-speed, turbulence, and air pressure— they make during the flight, apart from frequent communication with Air Traffic Control (ATC). Although advanced measurement devices capture multiple data and transmit them onto easy-to-read multicolor displays, the captain must continuously observe these changing parameters while being fed critical information by the co-pilot.
The pilot’s situation mirrors that of the design engineer who is also required to filter and analyze big data swiftly for selection of the optimal design. The co-pilot’s narration of the various parameters and the myriad values on display are analogous to the reports that the engineer uses to eventually chart out the electrostatic discharge (ESD)-safe and most effective path for the IC chip.
It is quite apparent that an effective ESD analysis depends squarely on the quality of reports. It is the efficient reporting and visualization in Voltus ESD that give designers a comprehensive overview and the ability to locate pertinent details. This leads to faster analysis and debugging of ESD issues to avoid chip failure. In this concluding blog of the “Demystifying ESD” series, we talk about how to read the Voltus ESD analysis reports and utilize its GUI features to gain a clear insight on ESD needs from the early-design phase to tapeout.
The ESD Report feature is designed to help you quickly detect the top violating paths that can cause ESD failures. ESD reports and GUI make it easy to:
Types of Reports Available
The types of ESD reports generated during Voltus ESD analysis are:
How to View Your ESD Reports
The ESD analysis flow generates the ESD directory that contains all the ESD reports. You can view the ESD reports in both the command line interface and the graphical user interface (GUI) mode.
Let’s see how to access and view the ESD results in the Voltus GUI:
You can choose to refer to the reports for data mining or load it in GUI to graphically visualize them.
Strategies to use ESD Reports and GUI to the Fullest Potential
Use the following features to rapidly identify and resolve design violations using the reports and the GUI:
Voltus ESD solution offers an easy way to verify the robustness of the ESD protection scheme for your ICs by reporting ESD susceptible devices and the associated current discharge paths. As the captain of your airship, you can trust these concise and accurate reports generated by your co-pilot and navigator and steer your precious design forward without worrying about the uncertainties at landing.
-- Vijetha K Singh and Priya E. Joseph
For more information on Cadence digital design and signoff products and services, visit www.cadence.com.
“Voltus Voice” showcases our product capabilities and features, and how they empower engineers to meet time-to-market goals for the complex, advanced-node SoCs that are designed for next-gen smart devices. In this monthly blog series, we also share important news, developments, and updates from the Voltus space.
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