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Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML

Transforming Chip Design with Cadence Cerebrus AI Studio

Cadence is transforming chip design with the launch of Cadence Cerebrus ® AI Studio…

Sean Kobayashi
• 1 min read
digital design , featured , agentic ai , designed with cadence , Cadence Cerebrus

Conformal AI Studio: Accelerated LEC/ECO/LP with AI/ML-Driven Enhancements

If you're a chip designer or verification engineer, you have likely spent countless…

David Stratman
• 5 min read
conformal , featured , Digital Implementation , Conformal AI Studio , AI/ML
Digital Design
Latest blogs

CDNLive! Silicon Valley 2010: User Papers Explore Digital Implementation

I previously wrote about the general session of the 2010 CDNLive! Silicon Valley…

• 2 min read
EDA360 , Silicon Realization , Digital Implementation , CDNLive!

CDNLive! Silicon Valley 2010: What EDA360 Means to Digital Implementation Engine…

CDNLive! Silicon Valley 2010 -- our user's group meeting and more -- kicked off yesterday…

• 4 min read
CDNLive , system realization , EDA360 , Silicon Realization , Digital Implementation , SoC Realization , CDNLive!

Five-Minute Tutorial: ecoAddRepeater

In today's tutorial, we're going to talk about the Encounter Digital Implementation…

• 3 min read
EDI system , tutorial , encounter , Digital Implementation , five minute , ecoAddRepeater

3D-IC TSV Realization: The Race Has Begun!

3D IC discussions are creating quite a buzz these days. No conference is complete…

• 3 min read
packaging , 3D-IC , 3DIC , TSV , Floorplanning , Test , Digital Implementation , 3D , thermal

Guest Blog: Using dbTransform to Translate Geometric Coordinates in Encounter

This is a guest post from JasonG at Avago. I hope you enjoy this useful piece he…

• 4 min read
Avago , dbTransform , encounter , db access , Digital Implementation , tcl

Encounter Puzzler #2 Solution: Finding Registers Beneath a Hierarchy

Thanks to everyone who participated in this week's Encounter Puzzer . If you didn…

• 6 min read
dbGet , encounter , Digital Implementation , puzzler , tcl

Five-Minute Tutorial: Creating a NONDEFAULT Rule

Ah, the NONDEFAULT rule. This is a routing rule that is, well, not the default! It…

• 2 min read
nondefault rule , EDI system , tutorial , encounter , Digital Implementation , nondefault , five minute , five-minute

Encounter Puzzler #2: Finding Registers Beneath a Hierarchy

I hope you enjoyed our first Encounter Puzzler: Where Did My Fences Go? The source…

• 1 min read
dbGet , encounter , Digital Implementation , puzzler , tcl

Five-Minute Tutorial: Encounter Command Line Help

Hi everyone, and welcome to the first Five-Minute Tutorial! I have several things…

• 2 min read
EDI system , tutorial , encounter , help , Digital Implementation , command line , five minute , five-minute

Encounter 101: Implementing ECOs with ecoDesign

When people say "ECO" in the context of back-end digital implementation tools, they…

• 2 min read
ECO , encounter , Digital Implementation , ecoDesign

Encounter Puzzler Solution: Where Did My Fences Go?

A couple of days ago I posted a puzzler on a scenario where fences couldn't be seen…

• 3 min read
fences , Floorplanning , encounter , Digital Implementation , puzzler

Encounter Puzzler: Where Did My Fences Go?

A while back I visited a customer I see on a fairly regular basis. As soon as I entered…

• 1 min read
fences , Floorplanning , encounter , Digital Implementation , puzzler

CDNLive! Silicon Valley Abstract Deadline Extended 1 Week

The deadline for submitting abstracts to CDNLive! Silicion Valley 2010 has been extended…

• less than a min read
CDNLive!

Webinar: SOI Gives More Performance Per Watt, And There's An Easy Path

If you've seen any of the recent buzz lately around Silicon-On-Insulator (SOI),…

• less than a min read
Low Power , webinars , Low-Power , Power-Efficient Design , Digital Implementation , Silicon on Insulator , Power Analysis , mixed signal , SOI , power

Abstracts For CDNLive! Silicon Valley 2010 Due August 22

Don't let the name CDNLive! confuse you. It's the Cadence user's group conference…

• 2 min read
Floorplanning , hierarchical design , Digital Implementation , CDNLive! , tcl

EDA Follow-The-Leader ... Signoff In The Design Flow

As a member of the EDA community, I find it interesting and somewhat frustrating…

• 1 min read

Programmatically Capturing Cell Delay In The Encounter Digital Implementation Sy…

A while back we were talking about how to programatically troubleshoot timing violations…

• 5 min read
Static timing analysis , CTE-TCL , Digital Implementation , scripting , tcl

DAC 2010 – A “Coming Out” Party For 3D-IC Design

Overall, the 2010 Anaheim DAC was livelier than the years before. Customer and vendor…

• 2 min read
DATE , CSV , 3DIC , TSV , Wirebond , Digital Implementation , 3D , stacked die , flip chip , PoP

Mixed Signal: Why The Sudden Attention?

With DAC 2010 rapidly approaching, we can again expect that lots of EDA and IP vendors…

• 2 min read
DAC , SoC , Mixed-Signal , Digital Implementation , mixed signal

What you didn’t know about DFM for advanced node designs: “In-route” is insuffic…

Recently, there has been a lot of buzz about addressing DFM issues during routing…

• 3 min read
Digital Implementation forums , DRC , design rules , EDA , Encounter Digital Implementation System 9.1 , Manufacturability sign-off , Digital Implementation , Encounter Digital Implementation , EDI system Encounter Digital Implementation System , DFM

Hands Up, Anyone Believe That Toyota's Problems Are All Physical?

In the past number of weeks/months we have all seen how Toyota has struggled to manage…

• 2 min read
toyota , Digital Implementation , BMW , microprocessor , verification

EDP Symposium Uncovers an Inconvenient Truth with a Shot of 3D

Every April the leading edge of the leading edge of semiconductor industry meet…

• 3 min read
DATE , CSV , 3DIC , TSV , Wirebond , Digital Implementation , stacked die , flip chip , PoP

IR Drop Analysis: It's Not Really Necessary, Is It?

I was recently asked by an engineering manager if running IR drop analysis was really…

• 2 min read
VDD , VDD I/O , Digital Implementation , IR drop , EM Failures

My DATE With 3DIC Technology

This year DATE (Design, Automation and Test in Europe) was in snowy cold Dresden…

• 3 min read
DATE , CSV , 3DIC , TSV , Wirebond , Digital Implementation , stacked die , flip chip , PoP

Signoff-Driven Implementation = Consistent and Convergent = Predictable and Effi…

Digital designs are reaching 10's of millions of instances, which makes efficiency…

• 2 min read
timing system , dynamic rail analysis , Static timing analysis , Early Rail Analysis , Multi-Core and Parallel rocessing , Statistical , Extraction , Signoff Analysis , timing constraints , SI analysis , noise analysis , OCV , Signal Integrity , Digital Implementation , Timing analysis , Power Analysis , signoff , timing convergence

Encounter How To: Writing To/Reading From a File With TCL

A couple weeks ago, there was a good thread in the Digital Implementation Forums…

• 2 min read
EDI system , encounter digital implementation system , Digital Implementation , Closure , Foundation Flow Design , scripting , tcl

User Review of The Encounter Foundation Flow

This is a guest post from John McGehee. John is an independent consultant in Silicon…

• 4 min read
Foundation Flow , Encounter Digital Implementation System 9.1 , scripting , Encounter Digital Implementation System 8.1

Three Reasons to Move to EDI System 9.1

We recently announced the 9.1 version of the Encounter Digital Implementation System…

• 1 min read
Foundation Flow Design Closure , Encounter Digital Implementation System 9.1 , Digital Implementation , EDI system Encounter Digital Implementation System
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