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Cadence Welcomes VLAB Works

Cadence welcomes VLAB Works, a division of Australian Semiconductor Technology Corporation…

Corporate
• less than a min read
Automotive , featured , Virtual Development Environment , vlab , Protium

Time on Your Side: Launching PSS Perspec Composer

We all agree that time is precious. As PSS ( Portable Stimuli Standard ) models get…

OK202502201742
• 3 min read
featured , Perspec , pss , portable stimulus

Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)

USB Promoter Group has released the eUSB2® Version 2.0 specification (eUSB2v2) in…

Sanjeet Kumar
• less than a min read
Verification IP , eUSB2v2 , featured , Functional Verification , USB
Verification
Latest blogs

Tech Tip: Dramatically Improve Throughput With “Assertion Distributor”

There are several ways that Incisive Formal Verifier (IFV) can be set to evaluate…

• 4 min read
ABV , Functional Verification , vPlan , Fornal , Desktop Manager , IEV , IFV

Video Interview: UVM Book Authors Sharon Rosenberg And Kathleen Meade

Earlier today a new book called "A Practical Guide to Adopting the Universal Verification…

• 1 min read
DAC , uvm , Functional Verification , OVM , DVcon , eRM , Accellera VIP TSC , VMM

New UVM Book Is For You And U But Not Ewe

A Practical Guide to Adopting the Universal Verification Methodology (UVM) is the…

• 2 min read
SystemVerilog , uvm , TLM , Functional Verification , Testbench simulation , OVM , EDA360 , Register Package , OOP , Accellera , eRM , Accellera VIP TSC , IES-XL

System Realization Alliance -- An Industry Collaboration

System Realization is a very broad topic. It encompasses all aspects of system design…

• 1 min read
TLM , system realization , EDA360 , HLS , ESL , verification

Sign Up For Free Verification Sessions -- Only A Few Days Left

Mark your calendar and sign up for the two upcoming free verification sessions sponsored…

• 1 min read
workshops , Specman , Coverage-Driven Verification , EDA , Incisive , e , team specman , Aspect Oriented Programming , MDV , IES-XL

Software Development Tool Teardown For The Motorola Droid

Lately, device teardowns of consumer electronics have become popular. There are many…

• 4 min read
ADB , GDB , android , QXDM , DDMS , JTAG , ETM , vnc , Monkey , QPST , Systemm Verification

More Thoughts On How To Choose Between The OVM And The UVM

There has been a lot of on-line discussion since DAC about whether the Universal…

• 2 min read
uvm , OVM , VIP , EDA , Accellera , Mentor

Changing the Status Quo in SoC to System Hand-off

As part of EDA360 Cadence is learning how to play a more significant role in the…

• 4 min read
Device Drivers , virtual platforms , Droid

Duolog Interview At DAC 2010, And The IP Integration Aspect Of EDA360

One virtue of events like DAC is that is provides an open forum for vendors to show…

• less than a min read
Cadence Connections , DAC , uvm , IP , IP-XACT , OVM , EDA360 , Duolog

Why The UVM Is Ready For Production Use Today -- Part 3

This is the final installment of my blog posts based on the three common questions…

• 1 min read
uvm , Verification methodology , OVM , VIP , Accellera VIP TSC

Why The UVM Is Ready For Production Use Today - Part 2

In my last blog post , I talked about the three most common questions I heard at…

• 1 min read
DAC , uvm , OVM , VIP , EDA

DAC Report: Interview With AMIQ And Update On Their “DVT” IDE

One of the benefits of the Design Automation Conference is the opportunity to follow…

• 1 min read
SystemVerilog , DAC , uvm , OVM ML , Functional Verification , OVM , EDA360 , e , OVM-e , Verilog , AMIQ , VHDL

DAC report: Video Interview With Zocalo

One of the benefits of the annual Design Automation Conference is the opportunity…

• 1 min read
DAC , ABV , Functional Verification , Formal Analysis , EDA360 , EDA , SVA , IEV , IFV

Why The UVM Is Ready For Production Use Today - Part 1

As I mentioned in my DAC report , I spent the largest percentage of my time at the…

• 2 min read
DAC , uvm , Functional Verification , OVM , VMM

Tech Tip On Verification Environment Re-Use

Verification has come a long way this past year, the highlight of which is UVM. UVM…

• 1 min read
Verification methodology , metric driven verification (MDV) , Functional Verification , OVM , Plan and metrics management

DAC Perspective One Week Later

DAC in Anaheim last week was as busy as always, perhaps more so, and of course I…

• 2 min read
DAC , uvm , Functional Verification , OVM , EDA360 , Denali , MDV

IntelliGen Moving Into The Spotlight With Pgen Deprecation

Specman's new Aspect Oriented Generation Engine, IntelliGen, has now been in service…

• 1 min read
IntelliGen , Specman , VIP , EDA , e , Funcional Verification , team specman , specman elite , Aspect Oriented Programming , CMS , Incisive Enterprise Simulator (IES) , AOP , IES-XL

DAC360: Photo blog of DAC 2010 in Anaheim, CA

Click here or on the image below to go to the annotated photo blog of DAC 2010. Images…

• less than a min read
DAC , Specman , TLM , Functional Verification , IBM , OVM , EDA360 , TSMC , Palladium XP , Mike Stellfox , Denali , iPad , AMIQ , Twitter , XJTAG , IEV , Incisive Enterprise Simulator (IES) , Accellera VIP TSC , IFV , IES-XL

DAC Cabbie Taught Me All I Need to Know About Verification

Confidence from competence. Measurement through metrics. Sell without selling. These…

• 4 min read
SystemVerilog , DAC , uvm , ABV , OVM , EDA360 , Register Package , Incisive , Funcional Verification , AMIQ , Twitter , MDV , Accellera VIP TSC , IES , VMM

What's The Best Way To Reduce SoC Development Costs?

Before I got started with my DAC 2010 customer meetings on Monday morning, I stopped…

• 2 min read
TLM2 , virtual platforms , virtual prototypes , SystemC , DAC 2010

Hit The Road - DAC!

OK, now that the Design Automation Conference (DAC) seems to be rotating among San…

• 1 min read
DAC , uvm , Functional Verification , OVM

Snapshots From Day 0 of DAC 2010

Below are some snapshots of some "day 0" events, and last minute DAC preparations…

• less than a min read
DAC , uvm , OVM , Palladium XP

Advanced Option Brings New Features to Specman/e Users

Great news for Specmaniacs -- a new Specman Advanced Option is being announced at…

• 1 min read
SystemVerilog , DAC , Specman , Functional Verification , Multi-Core , e , team specman , specman elite , Incisive Enterprise Simulator (IES) , IES-XL

A New Toy for UVM Geeks

Wasn't it great when you were a kid at Christmas, and you got all those new toys…

• 1 min read
SystemVerilog , methodology , Verification methodology , metric driven verification (MDV) , Functional Verification , Incisive , MDV

Cadence Contributes ESL Methodology To TSMC Reference Flow 11

The EDA360 industry vision document shows how growing complexity and application…

• 3 min read
ECO , OIP , C to Silicon , TSMC , system , ESL , verification

Accelerating Metric-Driven Verification With “Hotswap” on Verification Computing…

For a while now, Cadence has been providing leading verification solutions and methodologies…

• 1 min read
emulator , DAC , Acceleration , Palladium , hotswap , Emulation , hot swap , metric , metric-driven verification , MDV

Specman, e, and EDA360

The EDA industry is all abuzz over the new vision paper "EDA360 - The Way Forward…

• 5 min read
SystemVerilog , DAC , AMS , uvm , Specman , IP , HW/SW , methodology , CDNLive , metric driven verification (MDV) , Functional Verification , VIP , EDA360 , Mixed Signal Verification , Multi-domain verification: HW/SW co-verification , Incisive , e , OVM-e , ISX (Incisive Software Extensions) , ClubT , Aspect Oriented Programming , SystemC , ISX , MDV , Incisive Enterprise Simulator (IES) , VHDL , ESL , AOP , Matlab , IES-XL , Trailblazer

India Takes The Lead By Hosting The First Two “ClubTs” in 2010

Specman/ e users in India were very excited to see the first two ClubT events hosted…

• 4 min read
IntelliGen , Specman , Functional Verification , validation , e , team specman , ClubT , AOP , IES-XL
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