• Discussion

  Reuse package symbols (*.dra) in OrCAD Layout ? Locked

  13260 views
  1 reply
  Latest over 17 years ago
  by redwire
• Discussion

  Is it possible to change padstack characteristics inside a PCB

  14058 views
  4 replies
  Latest over 17 years ago
  by ELEKVN
• Discussion

  Trigger on Select/Unselect Locked

  5124 views
  8 replies
  Latest over 17 years ago
  by skillUser
• Discussion

  How do you take the cdr of a tconc list? Locked

  15823 views
  2 replies
  Latest over 17 years ago
  by dmay
• Discussion

  axlDBCreatePath

  14161 views
  4 replies
  Latest over 17 years ago
  by dgstan
• Discussion

  Layout Instance Names on VNL Netlists? Locked

  14030 views
  1 reply
  Latest over 17 years ago
  by tpylant
• Discussion

  Reminder: Encounter Digital Implementation Office Hours Starting Soon Locked

  13436 views
  0 replies
  Started over 17 years ago
  by BobD
• Discussion

  can LEC provide cdc check? Locked

  19442 views
  9 replies
  Latest over 17 years ago
  by timmynolan
• Discussion

  adding simulator views to a PDK (additional questions) Locked

  13495 views
  0 replies
  Started over 17 years ago
  by Aksl
• Discussion

  Op- Amp loop gain measurement Locked

  1541 views
  1 reply
  Latest over 17 years ago
  by johannes
• Discussion

  Verilog-XL install Locked

  14289 views
  0 replies
  Started over 17 years ago
  by bdatta
• Discussion

  What different between PCB Editor15.5 and PCB Editor16.0

  13667 views
  2 replies
  Latest over 17 years ago
  by ELEKVN
• Discussion

  Highlighting nets from Allegro Constraint Manager Locked

  15865 views
  3 replies
  Latest over 17 years ago
  by Russ Boquette
• Discussion

  Reg:Negative Artwork in Allegro Locked

  5120 views
  5 replies
  Latest over 17 years ago
  by Sakthivel
• Discussion

  A pin with the number "xxx" exists twice in "XXX" package, but I cannot find "XXX" in the schematic Locked

  2216 views
  1 reply
  Latest over 17 years ago
  by oldmouldy