• Discussion

  CDB convert to OA. Every layout display normally but nch_mac Locked

  9799 views
  2 replies
  Latest over 3 years ago
  by Danielrayray
• Discussion

  SysCap - Tip of the Week: Quick settings for Project Explorer

  1582 views
  1 reply
  Latest over 3 years ago
  by tapangel
• Discussion

  Plot all digital traces in one subwindow Locked

  12569 views
  6 replies
  Latest over 3 years ago
  by Andrew Beckett
• Discussion

  opening pdf file with okular Locked

  10036 views
  3 replies
  Latest over 3 years ago
  by saurabh96
• Discussion

  Annotate node voltages / DC operating points Locked

  9504 views
  1 reply
  Latest over 3 years ago
  by Andrew Beckett
• Discussion

  Assembler: possible to re-evaluate only results yielding "eval err" right after simulation? Locked

  3898 views
  2 replies
  Latest over 3 years ago
  by dontpanic
• Discussion

  How to copy-paste waveforms from the PSpice Probe window to a Word document

  8862 views
  0 replies
  Started over 3 years ago
  by DesignTech
• Discussion

  How to generate & view files from GUI forum Locked

  3427 views
  7 replies
  Latest over 3 years ago
  by Drake96
• Discussion

  Maestro Expression Migration Problem Locked

  10444 views
  3 replies
  Latest over 3 years ago
  by Kevin Buck
• Discussion

  How to get/set name of the selected pin in schematic Locked

  5438 views
  7 replies
  Latest over 3 years ago
  by Andrew Beckett
• Discussion

  how to update "design" when copy testbench Locked

  1702 views
  1 reply
  Latest over 3 years ago
  by Andrew Beckett
• Discussion

  how to use signal name in calc expressions rather than its whole path ? Locked

  9744 views
  1 reply
  Latest over 3 years ago
  by Andrew Beckett
• Discussion

  For ADE Assembler, is there an option to "Save simulation data" on specific nets for transient simulation? Locked

  4655 views
  2 replies
  Latest over 3 years ago
  by UniFleSou
• Discussion

  Documentation about VNL netlist format Locked

  9065 views
  2 replies
  Latest over 3 years ago
  by marcelpreda
• Discussion

  Writing into a file in Verilog-A Model Locked

  9819 views
  2 replies
  Latest over 3 years ago
  by Ketrin