Why Kirchhoff's Current Law is not satisfied at my circuit?

Given that Spectre checks Kirchoff's current law as one of its convergence criteria, it's highly likely that this is either:

1. Kirchoff's current law is being met within the simulator tolerances (bear in mind that circuit simulators give you a result within a tolerance, not to absolute accuracy)
2. The gmin conductances are responsible for the difference (that's usually an effect within the tolerances too)
3. The device models are inline subckts and so the reported current Is the current of the inline device, not the whole subckt.

I can't really tell from your graphs because the currents are on a log scale which makes it hard to see the actual values on the graph. However, they do (in the "flat" part) look very small, and given that iabstol is 1e-12A by default, it may just be a tolerance or gmin issue. To be sure, can you please post the input.scs file (is this using gpdk045?).

Regards,

Andrew

Thank you for your kind reply, Andrew.

My input.scs file is below.

simulator lang=spice
.MODEL nch nmos LEVEL=61

+ alphasat = 0.6 cgdo = 51.8e-10 cgso = 51.8e-10 def0 = 0.6

+ delta = 5.0 el = 0.35 emu = 0.06 eps = 11

+ epsi = 7.4 gamma = 0.004 gmin = 1.65e21 iol = 0

+ kasat = 0.006 kvt = -0.036 lambda = 0.0008 m = 2.5

+ muband = 0.001 rd = 500 rs = 500 sigma0 = 0

+ tnom = 27 tox = 1.0e-7 v0 = 0.12 vaa = 7.5e3

+ vdsl = 7 vfb = 0.5 vgsl = 7 vmin = 0.01 vto = 0.5

And, Transfer curve and output curve of this model and linear scale graph of current exist in uploaded file.

Cadence forum question(2)_yysunj.pptx

Thank you

yysunj

You've not included an input.scs. You've shared a model, but not the input.scs

I want to see that so I can see precisely how the circuit is connected, what parameter values there are, and any simulation/analysis options.

Andrew

Perhaps what you want is a netlist of circuits?

If not, what input.scs are you talking about?

Thank you

yysunj

If you use Simulation->Netlist->Display (or Create), this is the netlist passed to the simulator (and the file is called "input.scs"). It is a complete description of the circuit to be simulated, the parameters used, the analyses and options and information about what is saved. 

The file resides in the netlist directory that ADE uses.

Rather than a screenshot of a schematic, the input.scs would allow me to re-run your simulation and check the results at my end, rather than trying to recreate the schematic, guess what you've done, and still maybe have a difference.

So I'd like you to find this file, and upload it to the thread.

Andrew

Dear yysunj,

I took some time to study the PowerPoint file you included the link to in your initial post. I noticed a few items that may be responsible for your comment on its page 3:

"According to KCL, M1/S + M0/D + M3/G = 0. But, this result does not satisfy above equation."

1. What assumptions are made about the bulk node connections to your MOS devices M0, M1, and M3? In any integrated MOS device, for an NMOS device, the bulk node is the most negative voltage in the circuit. With -3V at the gate of MO and my lack of knowledge about the voltages at the drain and source of M1, my concern is that the bulk node may be conducting currents that will not be included in the drain, source, and gate terminal currents. Basically, all MOS devices are in reality 4 terminal devices and some assumption must exist about the bulk node for your three devices.

2. What are your simulator accuracy settings? I find that to accurately estimate currents in a transient simulation (i.e. assure KCL is satisfied as spectre does as Andrew noted), the simulator accuracy setting must be considered. The currents you display on page 3 are all "relatively" small and hence the question. Have you tried repeating your transient simulation with a set of increasing accuracy simulation settings to verify the results are all similar?

3. Are you using the "highvoltage option" (see Figure 1)? The use of this option can improve simulator accuracy as your voltages are rather large (13 V difference in your case). From the Cadence help menu:

"To improve the simulation accuracy of high-voltage circuits (where the maximum voltage is greater than 10 volts), or circuits that have convergence issues and report large capacitance values in the log file, you can set the highvoltage parameter in the options statement to yes"

Shawn

Figure 1

Dear Andrew and Shawn,

1. The input.scs file of my simulation is below.

// Generated for: spectre
// Generated on: Jun 1 20:44:31 2021
// Design library name: Tutorial_1st
// Design cell name: Circuit
// Design view name: schematic
simulator lang=spectre
global 0
include "/home/yysunj/model12.scs"

// Library name: Tutorial_1st
// Cell name: Circuit
// View name: schematic
M3 (net6 net1 Vout ) nch w=100u l=10u
M2 (Vout net7 0 ) nch w=100u l=10u
M1 (net10 net9 net1 ) nch w=10u l=10u
M0 (net1 net4 0 ) nch w=1 l=10u
V7 (net7 0) vsource dc=1.3 type=dc
V6 (net6 0) vsource dc=10 type=dc
V0 (net4 0) vsource dc=-3 type=dc
V5 (net08 0) vsource type=pulse val0=0 val1=6.3 period=40 delay=10 \
rise=1.000u fall=1.000u width=19.999998
V2 (net10 net08) vsource type=pulse val0=0 val1=-6.3 period=40 delay=50 \
rise=1.000u fall=1.000u width=19.999998
V3 (net05 0) vsource type=pulse val0=-3 val1=10 period=40 delay=10 \
rise=1.000u fall=1.000u width=19.999998
V4 (net9 net05) vsource type=pulse val0=0 val1=-13 period=40 delay=50 \
rise=1.000u fall=1.000u width=19.999998
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
checklimitdest=psf
tran tran stop=4000 errpreset=moderate write="spectre.ic" \
writefinal="spectre.fc" annotate=status maxiters=5
finalTimeOP info what=oppoint where=rawfile
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts where=rawfile
save M1:s M0:d M3:g
saveOptions options save=allpub

* "/home/yysunj/model12.scs" is below.

simulator lang=spice
.MODEL nch nmos LEVEL=61

+ alphasat = 0.6 cgdo = 51.8e-10 cgso = 51.8e-10 def0 = 0.6

+ delta = 5.0 el = 0.35 emu = 0.06 eps = 11

+ epsi = 7.4 gamma = 0.004 gmin = 1.65e21 iol = 0

+ kasat = 0.006 kvt = -0.036 lambda = 0.0008 m = 2.5

+ muband = 0.001 rd = 500 rs = 500 sigma0 = 0

+ tnom = 27 tox = 1.0e-7 v0 = 0.12 vaa = 7.5e3

+ vdsl = 7 vfb = 0.5 vgsl = 7 vmin = 0.01 vto = 0.5

2. I changed my simulator accuracy setting from moderate to conservative, but result is very similar.

3. In my cadence virtuoso-simulator options, highvoltage option does not exist. (see Figure 1.)

    Figure 1

    [ My cadence version : virtuoso version 6.1.7-64b , sub-version : IC 6.7.7-64b.500.12]

Therefore, I think I may revise voltage pulse (10 V DC, 10 V pulse).

What do you think, Shawn?

Thank you

yysunj

Dear Andrew and Shawn,

1. The input.scs file of my simulation is below.

// Generated for: spectre
// Generated on: Jun 1 20:44:31 2021
// Design library name: Tutorial_1st
// Design cell name: Circuit
// Design view name: schematic
simulator lang=spectre
global 0
include "/home/yysunj/model12.scs"

// Library name: Tutorial_1st
// Cell name: Circuit
// View name: schematic
M3 (net6 net1 Vout ) nch w=100u l=10u
M2 (Vout net7 0 ) nch w=100u l=10u
M1 (net10 net9 net1 ) nch w=10u l=10u
M0 (net1 net4 0 ) nch w=1 l=10u
V7 (net7 0) vsource dc=1.3 type=dc
V6 (net6 0) vsource dc=10 type=dc
V0 (net4 0) vsource dc=-3 type=dc
V5 (net08 0) vsource type=pulse val0=0 val1=6.3 period=40 delay=10 \
rise=1.000u fall=1.000u width=19.999998
V2 (net10 net08) vsource type=pulse val0=0 val1=-6.3 period=40 delay=50 \
rise=1.000u fall=1.000u width=19.999998
V3 (net05 0) vsource type=pulse val0=-3 val1=10 period=40 delay=10 \
rise=1.000u fall=1.000u width=19.999998
V4 (net9 net05) vsource type=pulse val0=0 val1=-13 period=40 delay=50 \
rise=1.000u fall=1.000u width=19.999998
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
checklimitdest=psf
tran tran stop=4000 errpreset=moderate write="spectre.ic" \
writefinal="spectre.fc" annotate=status maxiters=5
finalTimeOP info what=oppoint where=rawfile
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts where=rawfile
save M1:s M0:d M3:g
saveOptions options save=allpub

* "/home/yysunj/model12.scs" is below.

simulator lang=spice
.MODEL nch nmos LEVEL=61

+ alphasat = 0.6 cgdo = 51.8e-10 cgso = 51.8e-10 def0 = 0.6

+ delta = 5.0 el = 0.35 emu = 0.06 eps = 11

+ epsi = 7.4 gamma = 0.004 gmin = 1.65e21 iol = 0

+ kasat = 0.006 kvt = -0.036 lambda = 0.0008 m = 2.5

+ muband = 0.001 rd = 500 rs = 500 sigma0 = 0

+ tnom = 27 tox = 1.0e-7 v0 = 0.12 vaa = 7.5e3

+ vdsl = 7 vfb = 0.5 vgsl = 7 vmin = 0.01 vto = 0.5

2. I changed my simulator accuracy setting from moderate to conservative, but result is very similar.

3. In my cadence virtuoso-simulator options, highvoltage option does not exist. (see Figure 1.)

    Figure 1

    [ My cadence version : virtuoso version 6.1.7-64b , sub-version : IC 6.7.7-64b.500.12]

Therefore, I think I may revise voltage pulse (10 V DC, 10 V pulse).

What do you think, Shawn?

Thank you

yysunj

Shawn's points about the bulk current don't make sense here - that wouldn't affect Kirchoff's law; it would be relevant if you were looking at the currents into the drain/gate/source of the same MOSFET as summing these may not add to zero as some current goes to the bulk. However, that's not what you're doing here - you're looking at all the current contributors onto the same node from three different MOSFETs.

Similarly the "highvoltage" option is to help with controlling accuracy at a reasonable cost (cost in terms of simulation time). That's because when simulating transient with errpreset=moderate, it uses the largest signal anywhere in the circuit to control the maximum allowed error on each node, and so having high voltages can reduce the accuracy on low voltage nodes. Often people switch to conservative in such cases (which uses the highest voltage on each node to set the allowed error for that node), but that will take more time steps and be slower. The highvoltage option simply means you can use the same moderate option (without a major penalty in terms of increased time steps) but allow a bit more granularity in determining the allowed error (it uses bins of voltage ranges). Either way, that's not the issue here - so I don't think your voltage pulse has anything to do with this.

I did a number of experiments, and the results are certainly within simulator tolerances - Kirchoff's law is being met, within simulator tolerances. It's just that due to trapezoidal ringing, it only just meets the criteria (which is that the sum of currents into the node should be less than reltol*(largest current into node)+iabstol). The accuracy settings do make a noticeably difference (so I'm not sure what you were doing to observe this). I plotted the sum of the three currents (M0:d+M1:s+M3:g) in various conditions, zoomed into the worst part of the curve (around the transition) - the title of each shows the conditions:

Since the peak currents of each contributor is about 30uA, the peak error here is about 30nA, so 1e-3 (reltol) times that current - all within expected tolerances.

Now I tightened reltol to 1e-4:

Notice that the error has dropped significantly. As before, the angular shape of the waveform is indicative of trapezoidal ringing. Here's what I get with reltol 1e-3, moderate, and method=gear2only:

The peak error is slightly higher here (still approximately at the tolerance range - probably caused by the change in criteria at the pulse end), but the ringing has stopped (as you'd expect with method=gear2only).

Now let's look at reltol=1e-3 and errpreset=conservative (conservative uses method=gear2only, relref=alllocal, and divides reltol by 10 so it's effectively 1e-4):

As you can see, it's similar to the method=gear2only moderate result, but the peak error has reduced to 3nA, because the reltol is smaller (so all still OK). Going further and setting reltol to 1e-4 with conservative (which means it is really 1e-5), I get:

The error is now 13pA, so tiny.

Now, in practice you rarely need to worry about tightening tolerances so much, because usually in reasonable sized circuits the error is dominated by one part of the circuit and most of the circuit resolves to much higher accuracy - and even then all nodes and currents are controlled by the errpreset/reltol settings (mainly) - which are usually enough to give you sufficient accuracy everywhere.

To summarise, there's no problem here - Kirchoff's Current Law is being met (within simulator tolerances). It's not due to the highvoltage settings (or not), and it's not due to bulk currents. It's also not the gmin resistor (until you get to the part of the curve beyond the pulse) - that starts to have a limiting effect on the current (you can set gmin=1e-15 to observe that; I'm not going to show that here). However, given that generally you don't care about currents in the pA range, this is usually not worth messing with as it can harm convergence (note too that iabstol is 1e-12 which can also limit the smallest current resolution to some extent).

Please don't take away from this that you need to tighten tolerances - you probably don't need to - you just need to understand what is going on. Simulators don't give exact answers (because they have to use numerical methods to find the solution), but I too often see people using excessive accuracy settings and then finding their simulations run slowly - and they didn't really need that level of accuracy.

Regards,

Andrew

Dear Andrew,

Andrew Beckett said:

Shawn's points about the bulk current don't make sense here - that wouldn't affect Kirchoff's law; it would be relevant if you were looking at the currents into the drain/gate/source of the same MOSFET as summing these may not add to zero as some current goes to the bulk.

I apologize for my question regarding the bulk node connections  that you did not think made sense. I am not familiar with the three terminal MOS model yysunj is using and hence was just trying to explore the possibility that the bulk current (since it has no defined terminal in the model) gets assigned to the drain node but the drain terminal current may truly only be the drain current and not include the bulk current. I was simply trying to provide as many possibilities as I could think of to yysunj to spur a possible path to an answer to his concern.

Andrew Beckett said:

Similarly the "highvoltage" option is to help with controlling accuracy at a reasonable cost (cost in terms of simulation time). That's because when simulating transient with errpreset=moderate,

This was the motivation for my possible suggestion that yysunj :

Unknown said:

Are you using the "highvoltage option" (see Figure 1)? The use of this option can improve simulator accuracy as your voltages are rather large (13 V difference in your case).

Obviously, this comment was not clear - and for that again I am sorry!

I was glad to see that yysunj provided the input.scs file and your expreimental efforts, Andrew, towards the other suggestion I made to yysunj:

Unknown said:

Have you tried repeating your transient simulation with a set of increasing accuracy simulation settings to verify the results are all similar?

Clearly, your experiments verify the motivation for my comment (2)...Thank you Andrew!

Shawn

Shawn

Thank you for your exact reply, Andrew and Shawn.

After hearing your explanation, I have a question, Andrew.

Last figure of your reply, the error is 13 pA.

This is very good result, but I want to reduce this error value from 13 pA to 13 aA.

How can I do this?

If I reduce reltol value from 1e-3 to 1e-9,can I get error value 13 aA?

If not, how can I get this error value (13 aA)?

Please tell me.

Thank you

yysunj

P.S. My circuit consists of just 4 transistors, so I do not have to consider simulation time.

I'm sorry, but that's a ridiculous goal. Your model won't have anywhere near that accuracy - and if it's not modelling leakage, what is the point?

You can get it lower with conservative, reltol=1e-5, gmin=1e-15 (500fA spike - the flat parts are about 12fA), but I cannot see any practical example with made up models where you really would expect this level of accuracy. That's not what circuit simulators are designed for.

BTW, you could also (with this simple circuit) set the gmin to 0, and then the flat parts are rather spiky due to numerical accuracy, but peak at 13aA (and is much lower than that the rest of the time). I would still question the meaning of such a simulation though.

Setting reltol to 1e-9 is not going to be a good idea, because you'd be running out of numerical resolution - given that you only have about 14-15 digits in a double precision floating point number, you're expecting to resolve the error by using 9 of those digits, plus there needs to be accurate derivatives computed and so on - that's asking for trouble. It's not just about simulation time - it's just that you're asking for accuracy when the model itself is probably a much coarser fit than that.

Andrew.

Thank you for your valuable reply, Andrew.

Leakage current of my transistor (IGZO TFT) is very low. (1e-21A/um).

And, I am simulating a situation where the charge stored in the capacitor is drained by the leakage current.

Therefore, I need very low error value.

But, you said that 13aA error value is impossible goal.

Why it is impossible?

It is because of the limitations of the simulator?

Or is it because of the limitations of the model (RPI-aTFT model)?

Or is it just because of the time it takes to simulate?

Please tell me.

Thank you 

yysunj

The issue is that you have a very high dynamic range - the normal currents in the circuit (which I assume might be of the order of 1uA) are 1e15 times higher than your leakage current is supposedly. If your model is really modelling that level of leakage current, it's going to be very difficult to resolve. Simulators use numerical analysis techniques to iterate towards a solution - and have to determine when they are close enough (within an acceptable error tolerance). That is usually (simplifying it for here - for more details you might want to look at The Designer's Guide to SPICE and Spectre by Ken Kundert or Steady-State Methods for Simulating Analog and Microwave Circuits by Kundert et al.) of the form |Fn(v(k))| < reltol*Fnmax + iabstol where Fn(...) are the currents flowing into a node, and Fnmax is the absolute value of the largest current. You can set iabstol to a very small number, but it does mean that it will spend a long time trying to resolve the differences in tiny currents (iabstol defaults to 1pA in spectre, and is normally about a millionth of a typical current in the circuit to give reasonable accuracy/performance). reltol is a measure of the normal dynamic range (worse-case) in the circuit, but you can't set it above around 1e9 because you'll just run out of numerical headroom. Added to that, there's gmin which is added to provide an artificial conductance to ground to ensure that nodes are not floating - effectively floating nodes (when there's no leakage path) lead to the simulator having to solve an ill-conditioned problem (in essence the matrices become impossible to solve as there are an infinite number of solutions that meet the conditions). That too helps with convergence but degrades modelling of leakage (especially if the gmin resistance is 1e-12 Siemens, which leads to pA scale currents in circuit operating around 1V). 

So you could set iabstol very small (e.g. 1e-30) and you could set gmin=0 and for this circuit that will simulate very quickly. However, I see a pretty noisy solution in the flat parts (getting a very accurate answer in the switching parts will be difficult because the dynamic range is higher there). You could also try relref=pointlocal but that will probably be very slow indeed and fail to converge.

This is really beyond the normal accuracy criteria used for circuit simulation. I can't spend more time trying to coax the simulator into an extremely atypical usage case.

Overall, I doubt the models you're using are good enough too.

Andrew.

Thank you for your exact reply!

yysunj