Custom IC Design

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Viva plot colors change on every iteration during real time tuning

Category: Custom IC Design

By imad

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updated over 6 years ago by Dimitra Papazoglou

1 replies • 14134 views
Discussion

Spectre: TRAN results slightly differ according to which outputs are saved

Category: Custom IC Design

By dontpanic

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updated over 6 years ago by dontpanic

2 replies • 14182 views
Discussion

Import Verilog

Category: Custom IC Design

By eppramod

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updated over 6 years ago by Quek

6 replies • 20959 views
Discussion

nested for loop and fwrite statement

Category: Custom IC Design

By SatendraMaurya

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updated over 6 years ago by SatendraMaurya

4 replies • 14703 views
Discussion

Cannot netlist config view of my testbench

Category: Custom IC Design

By mhkvy4

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updated over 6 years ago by Andrew Beckett

5 replies • 16651 views
Discussion

MDL Autostop Using cross and freq Functions

Category: Custom IC Design

By baltacican87

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updated over 6 years ago by baltacican87

2 replies • 14955 views
Discussion

Some Calculator Functions in MDL, Using a Variable in MDL

Category: Custom IC Design

By baltacican87

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updated over 6 years ago by baltacican87

2 replies • 15488 views
Discussion

Warning: ddiAddLibtoOA: Can't access library'Library name" at path "path" in OA 2.2. OA Exception is: Syntax error in .oalib file of the library

Category: Custom IC Design

By Anil Kumar Rajput

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updated over 6 years ago by Andrew Beckett

1 replies • 4006 views
Discussion

Which simulation type should I use and how ?

Category: Custom IC Design

By baran7up

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started over 6 years ago

0 replies • 13366 views
Discussion

Problem about Changing Simulation Output Format

Category: Custom IC Design

By MingHChou

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updated over 6 years ago by MingHChou

2 replies • 18767 views
Discussion

Assura QRC error in batch mode.

Category: Custom IC Design

By MedAn

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updated over 6 years ago by MedAn

4 replies • 15460 views
Discussion

ERROR (VACOMP-1008): Cannot compile ahdlcmi module library.

Category: Custom IC Design

By VoTuanMinh

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updated over 6 years ago by Andrew Beckett

11 replies • 21493 views
Discussion

Running ADE L several times in a day

Category: Custom IC Design

By ArmanHR

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updated over 6 years ago by Andrew Beckett

3 replies • 14189 views
Discussion

Virtuoso Chip Assembly Router in 6.1.8

Category: Custom IC Design

By mhkvy4

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updated over 6 years ago by mhkvy4

2 replies • 15417 views
Discussion

How get the "eventtime" variable calculated and used in the sampled PAC analysis

Category: Custom IC Design

By groviere

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updated over 6 years ago by groviere

2 replies • 2133 views

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