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Custom IC Design

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  • Discussion

    cross probing between layout and schematic

    Category: Custom IC Design

    By haritha8085

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    updated over 5 years ago by Andrew Beckett

    1 replies • 14832 views
  • Discussion

    Parametric simulation in Cadence ADEXL

    Category: Custom IC Design

    By NorNand

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    updated over 5 years ago by Andrew Beckett

    5 replies • 19136 views
  • Discussion

    floating metal check in layout

    Category: Custom IC Design

    By DavidLou

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    updated over 5 years ago by DavidLou

    4 replies • 16969 views
  • Discussion

    avoid local alteration on iterative instances

    Category: Custom IC Design

    By giopero

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    updated over 5 years ago by giopero

    2 replies • 14008 views
  • Discussion

    modeling output impedance in a file

    Category: Custom IC Design

    By dzakharian

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    updated over 5 years ago by dzakharian

    2 replies • 14793 views
  • Discussion

    VAR function output slowly

    Category: Custom IC Design

    By Franktgg

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    updated over 5 years ago by Andrew Beckett

    1 replies • 13672 views
  • Discussion

    Accessing data vector generated by a Virtuoso expression in Matlab using adeInfo

    Category: Custom IC Design

    By Cra1g

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    updated over 5 years ago by Andrew Beckett

    3 replies • 16307 views
  • Discussion

    verilogA timestep dynamic management

    Category: Custom IC Design

    By Fabb

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    updated over 5 years ago by Andrew Beckett

    5 replies • 20153 views
  • Discussion

    From ideal switch to CMOS transitor switch

    Category: Custom IC Design

    By Jaikrishnan

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    updated over 5 years ago by Jaikrishnan

    4 replies • 20270 views
  • Discussion

    Export regulation when taping out through an oversea foundry

    Category: Custom IC Design

    By Pathwave

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    started over 5 years ago

    0 replies • 13493 views
  • Discussion

    Building up array of instances

    Category: Custom IC Design

    By Nicolas Callens

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    updated over 5 years ago by Nicolas Callens

    4 replies • 20907 views
  • Discussion

    How to find the transient operating point of MOS device while simulating extracted netlist

    Category: Custom IC Design

    By RFStuff

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    updated over 5 years ago by Andrew Beckett

    13 replies • 19481 views
  • Discussion

    Quantus QRC generates "nan" valued resistors. Spectre throws an error and halts simulation

    Category: Custom IC Design

    By magal

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    updated over 5 years ago by magal

    2 replies • 1830 views
  • Discussion

    MC simulation results of copied-but-equal cells are different

    Category: Custom IC Design

    By HoWei

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    updated over 5 years ago by HoWei

    2 replies • 14081 views
  • Discussion

    Spectre or Symbol View

    Category: Custom IC Design

    By wgtkan

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    updated over 5 years ago by Andrew Beckett

    1 replies • 15287 views
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