Custom IC Design

Latest Posts

Discussion

VSR

Category: Custom IC Design

By sanjay skill

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 5695 views
Discussion

MTS to set specific model files to post-layout views not working

Category: Custom IC Design

By NewScreenName

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 5773 views
Discussion

"Error" TrTBFinder.cxt

Category: Custom IC Design

By AnalogAlchemy

$usertype
•
updated over 2 years ago by AnalogAlchemy

2 replies • 1082 views
Discussion

ADE Spec Comparison: How to set tolerance?

Category: Custom IC Design

By StephanWeber

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 5912 views
Discussion

Run transient with cmin option but applied to certain sub-circuits only?

Category: Custom IC Design

By StephanWeber

$usertype
•
updated over 2 years ago by StephanWeber

4 replies • 7709 views
Discussion

How to access the result of a netcap info analysis in ADE?

Category: Custom IC Design

By Zol

$usertype
•
updated over 2 years ago by Andrew Beckett

8 replies • 7715 views
Discussion

ADE Debug Environment: Plot to ViVA Service is not supported yet

Category: Custom IC Design

By SimbaG

$usertype
•
updated over 2 years ago by Andrew Beckett

2 replies • 6581 views
Discussion

4-Switch Buck-Boost Converter

Category: Custom IC Design

By Jeanja

$usertype
•
updated over 2 years ago by ShawnLogan

1 replies • 7557 views
Discussion

Monte Carlo "Process"

Category: Custom IC Design

By Karimeldeen

$usertype
•
updated over 2 years ago by ShawnLogan

1 replies • 1704 views
Discussion

Layout Marker Layer

Category: Custom IC Design

By Karimeldeen

$usertype
•
updated over 2 years ago by RobMan

1 replies • 6032 views
Discussion

Help on creating layout for a symmetric circuit by stitching two "half-layout"

Category: Custom IC Design

By A1vis

$usertype
•
updated over 2 years ago by A1vis

2 replies • 1962 views
Discussion

Non satisfying KCL equation for virtuoso simulation operating point

Category: Custom IC Design

By SMaxwell

$usertype
•
updated over 2 years ago by SMaxwell

15 replies • 11705 views
Discussion

Is there a way to set the net name as variable in a schematic?

Category: Custom IC Design

By grooo

$usertype
•
updated over 2 years ago by ShawnLogan

1 replies • 5669 views
Discussion

Is there any difference using Calibre and Spectre view to run simulation with parasitic?

Category: Custom IC Design

By Leo66

$usertype
•
updated over 2 years ago by Leo66

2 replies • 8510 views
Discussion

ParaViwe from EMX GUI 6.3 issue

Category: Custom IC Design

By NewScreenName

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 6520 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.