Custom IC Design

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Discussion

Assembler: possible to re-evaluate only results yielding "eval err" right after simulation?

Category: Custom IC Design

By dontpanic

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updated over 3 years ago by dontpanic

2 replies • 3870 views
Discussion

Maestro Expression Migration Problem

Category: Custom IC Design

By Kevin Buck

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updated over 3 years ago by Kevin Buck

3 replies • 10273 views
Discussion

how to update "design" when copy testbench

Category: Custom IC Design

By sjwprcker

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updated over 3 years ago by Andrew Beckett

1 replies • 1668 views
Discussion

Documentation about VNL netlist format

Category: Custom IC Design

By marcelpreda

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updated over 3 years ago by marcelpreda

2 replies • 8934 views
Discussion

Writing into a file in Verilog-A Model

Category: Custom IC Design

By Ketrin

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updated over 3 years ago by Ketrin

2 replies • 9671 views
Discussion

Sweep the real inductor value in virtuoso

Category: Custom IC Design

By Detailer

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updated over 3 years ago by Andrew Beckett

4 replies • 12663 views
Discussion

Could I run only one "runPlan" in Verifier?

Category: Custom IC Design

By SpiceMonkey

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updated over 3 years ago by Andrew Beckett

3 replies • 1893 views
Discussion

Pnoise analysis of a clock divider with uneven even/odd output cycles

Category: Custom IC Design

By csn165309964

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updated over 3 years ago by FormerMember

5 replies • 4578 views
Discussion

Changing Schematic Property Value in CIW Window

Category: Custom IC Design

By bjlanza

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updated over 3 years ago by bjlanza

2 replies • 9100 views
Discussion

How to change VIVA zoom time-axis (Shift+ mouse scroll)

Category: Custom IC Design

By Nader Fathy

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updated over 3 years ago by Andrew Beckett

5 replies • 11992 views
Discussion

Can I tailor the transition from Assembler to Explorer, like using double-click or RMB instead of simple click to arrow?

Category: Custom IC Design

By StephanWeber

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updated over 3 years ago by Andrew Beckett

1 replies • 8612 views
Discussion

ahdlLib quantizer Block

Category: Custom IC Design

By Firdos

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updated over 3 years ago by Andrew Beckett

1 replies • 10067 views
Discussion

post layout extracted simulation

Category: Custom IC Design

By abdurrahman0234

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updated over 3 years ago by FormerMember

1 replies • 10132 views
Discussion

ESD Protection general layout info

Category: Custom IC Design

By bford33

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updated over 3 years ago by FormerMember

1 replies • 9586 views
Discussion

AMS netlist with CDF parameter

Category: Custom IC Design

By RZAQA

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started over 3 years ago

0 replies • 8494 views

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