Custom IC Design

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Discussion

Transient stop time for specified number of clocks

Category: Custom IC Design

By Senan

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updated over 4 years ago by Andrew Beckett

7 replies • 15634 views
Discussion

How to flatten GDS by stream out or Command

Category: Custom IC Design

By MollyMeow

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updated over 4 years ago by MollyMeow

2 replies • 11751 views
Discussion

Environment variable questions

Category: Custom IC Design

By sjwprcker

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updated over 4 years ago by sjwprcker

2 replies • 11406 views
Discussion

Simulating with a Calibre Extracted Netlist with ADE Explorer

Category: Custom IC Design

By jshumble

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updated over 4 years ago by jshumble

3 replies • 13680 views
Discussion

pstb analysis shows different results at different iprobe position

Category: Custom IC Design

By Irenexox

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updated over 4 years ago by FormerMember

1 replies • 13278 views
Discussion

Sort function to sort the paths selected using the bbox or beginpt or end pt

Category: Custom IC Design

By kumargbn

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updated over 4 years ago by kumargbn

2 replies • 11674 views
Discussion

How to detect EOF with Verilog-ams fscanf?

Category: Custom IC Design

By Martinsh

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started over 4 years ago

0 replies • 11027 views
Discussion

Generating data in csv format from netlist simulation

Category: Custom IC Design

By sidm

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updated over 4 years ago by Andrew Beckett

3 replies • 11768 views
Discussion

2 Tone VerilogA signal source does not work in Harmonic balance

Category: Custom IC Design

By ChristophHoehn

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updated over 4 years ago by Andrew Beckett

3 replies • 11601 views
Discussion

lxSeriesTerms for a 4-port device

Category: Custom IC Design

By FormerMember

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updated over 4 years ago by Andrew Beckett

1 replies • 4316 views
Discussion

Accessing simulation variables in verilog-a without passed parameter?

Category: Custom IC Design

By MikeVP

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updated over 4 years ago by Andrew Beckett

3 replies • 13896 views
Discussion

passing a result from previous test ADEXL

Category: Custom IC Design

By stefan111

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updated over 4 years ago by stefan111

2 replies • 13954 views
Discussion

How to plot using Simulation files stored in a folder?

Category: Custom IC Design

By Shashank M Rao

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updated over 4 years ago by Andrew Beckett

2 replies • 11448 views
Discussion

Trying to make a custom bindkey for Virtuoso to work - Select by line but for certain object types only

Category: Custom IC Design

By Tom Sawyer

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updated over 4 years ago by Tom Sawyer

2 replies • 2190 views
Discussion

Multiple Noise Analysis in one Test

Category: Custom IC Design

By greywanderer

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updated over 4 years ago by greywanderer

6 replies • 14431 views

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