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Custom IC Design

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  • Discussion

    Evaluate an expression once per Corner - ADE Explorer

    Category: Custom IC Design

    By Conorp

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    updated over 6 years ago by Conorp

    2 replies • 3587 views
  • Discussion

    Jitter simulation, PSS +pnoise and matlab get different results

    Category: Custom IC Design

    By larrywan

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    updated over 6 years ago by Andrew Beckett

    1 replies • 17395 views
  • Discussion

    Liberate for library file

    Category: Custom IC Design

    By fengye

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    updated over 6 years ago by fengye

    23 replies • 25883 views
  • Discussion

    Assura DRC decks writing

    Category: Custom IC Design

    By Jayasheel

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    started over 6 years ago

    0 replies • 14535 views
  • Discussion

    emergency help!!! logic gates

    Category: Custom IC Design

    By hitman84

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    updated over 6 years ago by Andrew Beckett

    6 replies • 19275 views
  • Discussion

    Pnoise sim with different noise type

    Category: Custom IC Design

    By VINCENTCHENG

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    updated over 6 years ago by Andrew Beckett

    1 replies • 16496 views
  • Discussion

    custom marker layer

    Category: Custom IC Design

    By DavidLou

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    updated over 6 years ago by DavidLou

    4 replies • 16086 views
  • Discussion

    how to update connectivity reference hierarchically

    Category: Custom IC Design

    By NandGo

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    updated over 6 years ago by Andrew Beckett

    1 replies • 14956 views
  • Discussion

    Assura LVS not running

    Category: Custom IC Design

    By BahaaRadi

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    updated over 6 years ago by Andrew Beckett

    1 replies • 15089 views
  • Discussion

    How can the contents of the ADE XL rdb be loaded?

    Category: Custom IC Design

    By RobinJC

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    updated over 6 years ago by FrankKK

    9 replies • 19976 views
  • Discussion

    how can I hierarchically place the flatten top level

    Category: Custom IC Design

    By SatendraMaurya

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    updated over 6 years ago by Andrew Beckett

    1 replies • 15462 views
  • Discussion

    Display controls for path and vias

    Category: Custom IC Design

    By Merf

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    updated over 6 years ago by Merf

    6 replies • 16136 views
  • Discussion

    Do I delete my PVT data via Re-run Unfinished/Error Points in ade-xl

    Category: Custom IC Design

    By monglebest

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    started over 6 years ago

    0 replies • 1514 views
  • Discussion

    Decap Cells

    Category: Custom IC Design

    By ankiit

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    started over 6 years ago

    0 replies • 13766 views
  • Discussion

    ERROR: The subckt `NMOS_X' is being redefined

    Category: Custom IC Design

    By bitIIS31466

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    •

    updated over 6 years ago by Andrew Beckett

    1 replies • 1998 views
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