Custom IC Design

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Print Noise Summary after Pnoise Simulation(timedomain)

Category: Custom IC Design

By charlieWu

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updated over 5 years ago by charlieWu

5 replies • 3190 views
Discussion

Batch export of parasitic values in nets

Category: Custom IC Design

By CSCNalu

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updated over 5 years ago by CSCNalu

2 replies • 12574 views
Discussion

scaling layout

Category: Custom IC Design

By MReza Mah

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updated over 5 years ago by Andrew Beckett

1 replies • 14822 views
Discussion

FreePDK45 usage in Virtuoso

Category: Custom IC Design

By kevin998x

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updated over 5 years ago by Andrew Beckett

10 replies • 26828 views
Discussion

use sweep and montecarlo at the same time

Category: Custom IC Design

By Went

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updated over 5 years ago by Andrew Beckett

3 replies • 12695 views
Discussion

Consistent path to results for corner simulation?

Category: Custom IC Design

By Mike Bichan

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updated over 5 years ago by Andrew Beckett

1 replies • 13115 views
Discussion

How can I place vias with the size exact same cut width without metals around?

Category: Custom IC Design

By BaaB

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updated over 5 years ago by Andrew Beckett

1 replies • 12617 views
Discussion

Cadence virtuoso CDB to OA conversion ( ERROR*loadcontext )

Category: Custom IC Design

By mirtaji65

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updated over 5 years ago by Andrew Beckett

6 replies • 6624 views
Discussion

How to use PSS to determine the output dynamic range ?

Category: Custom IC Design

By Young2020

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updated over 5 years ago by Frank Wiedmann

1 replies • 12744 views
Discussion

Variable Pnoise Stop Frequency

Category: Custom IC Design

By Conorp

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updated over 5 years ago by Frank Wiedmann

5 replies • 15452 views
Discussion

csh C script for automating the ocean simulation

Category: Custom IC Design

By Aksh

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updated over 5 years ago by FormerMember

14 replies • 17877 views
Discussion

How to change default schematic symbol colors

Category: Custom IC Design

By Sutlieff

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updated over 5 years ago by Andrew Beckett

1 replies • 15075 views
Discussion

Symbolic (Analytical) Transfer function from Cadence (XF/PZ) for Simulink modeling

Category: Custom IC Design

By willTspriggs

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updated over 5 years ago by willTspriggs

4 replies • 5942 views
Discussion

VCCAP Usage and Documentation

Category: Custom IC Design

By EEE student

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updated over 5 years ago by EEE student

18 replies • 25771 views
Discussion

Make layout more visible in layout L

Category: Custom IC Design

By BaaB

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updated over 5 years ago by Andrew Beckett

1 replies • 12210 views

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