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Custom IC Design

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  • Discussion

    Plotting phase spectrum

    Category: Custom IC Design

    By sidt

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    updated over 4 years ago by sidt

    2 replies • 14957 views
  • Discussion

    Post Layout simulation accuracy

    Category: Custom IC Design

    By Fatima65

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    updated over 4 years ago by Frank Wiedmann

    7 replies • 14999 views
  • Discussion

    Virtuoso Cadence crashes when opening layout viewer

    Category: Custom IC Design

    By Eric2020

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    updated over 4 years ago by Andrew Beckett

    1 replies • 11388 views
  • Discussion

    How can I enlarge the result window in the horizontal axis direction?

    Category: Custom IC Design

    By yysunj

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    updated over 4 years ago by Andrew Beckett

    1 replies • 10832 views
  • Discussion

    Abstract Generator : ERROR (ABS-20024)

    Category: Custom IC Design

    By Chan ho

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    updated over 4 years ago by Andrew Beckett

    1 replies • 10777 views
  • Discussion

    How can I save the converged values at the nodes after the last iteration of the time step in verilog-A?

    Category: Custom IC Design

    By rhanna

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    updated over 4 years ago by rhanna

    6 replies • 12264 views
  • Discussion

    Time domain simulation of switched capacitor circuits

    Category: Custom IC Design

    By Svilen64

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    updated over 4 years ago by Andrew Beckett

    1 replies • 11261 views
  • Discussion

    How to netlist a VHDL-AMS generic of type "time" correctly in ADE?

    Category: Custom IC Design

    By Eckhard Hennig

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    updated over 4 years ago by Andrew Beckett

    2 replies • 2192 views
  • Discussion

    save graphical waveforms into ADE-XL views just like a spectre state view

    Category: Custom IC Design

    By PBWU

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    updated over 4 years ago by Andrew Beckett

    3 replies • 13323 views
  • Discussion

    How to set a pre-run MC simulation

    Category: Custom IC Design

    By Hannahyrh

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    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 10858 views
  • Discussion

    hex variable to verilog module

    Category: Custom IC Design

    By amacSS

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    updated over 4 years ago by amacSS

    6 replies • 15175 views
  • Discussion

    Is there a ready-to use oscillator model with PHN in Cadence available

    Category: Custom IC Design

    By HoWei

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    updated over 4 years ago by FormerMember

    3 replies • 11361 views
  • Discussion

    Export the result wave and use it in other simulations?

    Category: Custom IC Design

    By FormerMember

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    •

    updated over 4 years ago by FormerMember

    1 replies • 1587 views
  • Discussion

    Including markers and ruler in layout image export

    Category: Custom IC Design

    By AndreyDM

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    •

    updated over 4 years ago by quyleanh

    6 replies • 16902 views
  • Discussion

    Get X-value from an expression that plots Frequency vs. Vtune

    Category: Custom IC Design

    By HoWei

    $usertype

    •

    updated over 4 years ago by HoWei

    6 replies • 14698 views
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