Custom IC Design

Latest Posts

Discussion

Post Layout simulation accuracy

Category: Custom IC Design

By Fatima65

$usertype
•
updated over 4 years ago by Frank Wiedmann

7 replies • 14504 views
Discussion

Virtuoso Cadence crashes when opening layout viewer

Category: Custom IC Design

By Eric2020

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 11095 views
Discussion

How can I enlarge the result window in the horizontal axis direction?

Category: Custom IC Design

By yysunj

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 10568 views
Discussion

Abstract Generator : ERROR (ABS-20024)

Category: Custom IC Design

By Chan ho

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 10517 views
Discussion

How can I save the converged values at the nodes after the last iteration of the time step in verilog-A?

Category: Custom IC Design

By rhanna

$usertype
•
updated over 4 years ago by rhanna

6 replies • 11934 views
Discussion

Time domain simulation of switched capacitor circuits

Category: Custom IC Design

By Svilen64

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 10920 views
Discussion

How to netlist a VHDL-AMS generic of type "time" correctly in ADE?

Category: Custom IC Design

By Eckhard Hennig

$usertype
•
updated over 4 years ago by Andrew Beckett

2 replies • 2090 views
Discussion

save graphical waveforms into ADE-XL views just like a spectre state view

Category: Custom IC Design

By PBWU

$usertype
•
updated over 4 years ago by Andrew Beckett

3 replies • 12962 views
Discussion

How to set a pre-run MC simulation

Category: Custom IC Design

By Hannahyrh

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 10571 views
Discussion

hex variable to verilog module

Category: Custom IC Design

By amacSS

$usertype
•
updated over 4 years ago by amacSS

6 replies • 14749 views
Discussion

Is there a ready-to use oscillator model with PHN in Cadence available

Category: Custom IC Design

By HoWei

$usertype
•
updated over 4 years ago by FormerMember

3 replies • 11048 views
Discussion

Export the result wave and use it in other simulations?

Category: Custom IC Design

By FormerMember

$usertype
•
updated over 4 years ago by FormerMember

1 replies • 1538 views
Discussion

Including markers and ruler in layout image export

Category: Custom IC Design

By AndreyDM

$usertype
•
updated over 4 years ago by quyleanh

6 replies • 16517 views
Discussion

Get X-value from an expression that plots Frequency vs. Vtune

Category: Custom IC Design

By HoWei

$usertype
•
updated over 4 years ago by HoWei

6 replies • 14228 views
Discussion

Can you Store/Recall layer sets in Virtuoso?

Category: Custom IC Design

By CADcasualty

$usertype
•
updated over 4 years ago by CADcasualty

3 replies • 3343 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.