Custom IC Design

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Discussion

Plot Phase Noise of each sub-circuit from Calculator

Category: Custom IC Design

By Anjana Dissanayake

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updated over 3 years ago by Andrew Beckett

3 replies • 9557 views
Discussion

Using functions in Assembler global variables

Category: Custom IC Design

By Brad RFeng

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updated over 3 years ago by Andrew Beckett

5 replies • 12070 views
Discussion

pin map error after pex analyse in calibre

Category: Custom IC Design

By marzi

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updated over 3 years ago by marzi

2 replies • 10221 views
Discussion

Re-run Unfinished/Error Points Problem

Category: Custom IC Design

By Kevin Buck

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updated over 3 years ago by Andrew Beckett

1 replies • 2375 views
Discussion

Fluid Guard Ring porting can't show correct layer

Category: Custom IC Design

By Andy Su

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updated over 3 years ago by Andy Su

2 replies • 3420 views
Discussion

run multiple stb sim at the same time

Category: Custom IC Design

By sjwprcker

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updated over 3 years ago by Andrew Beckett

1 replies • 9829 views
Discussion

problem about hidding schematic in virtuoso

Category: Custom IC Design

By ppptt

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updated over 3 years ago by FormerMember

1 replies • 8641 views
Discussion

Cell copy problem with layout view in Cadence Virtuoso

Category: Custom IC Design

By Senan

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started over 3 years ago

0 replies • 8510 views
Discussion

How to use calculator in ADE Explorer

Category: Custom IC Design

By SpiceMonkey

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updated over 3 years ago by SpiceMonkey

2 replies • 13404 views
Discussion

LVS complaining about lower level hierarchal design

Category: Custom IC Design

By Senan

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started over 3 years ago

0 replies • 8297 views
Discussion

PVS requires pin Label to pass the LVS

Category: Custom IC Design

By Senan

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updated over 3 years ago by Senan

2 replies • 9872 views
Discussion

PDK automation system

Category: Custom IC Design

By hustyzw

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updated over 3 years ago by Andrew Beckett

1 replies • 9335 views
Discussion

ADE Explorer Checks/Asserts Skip Device Inside Subckt is giving an error

Category: Custom IC Design

By Nader Fathy

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updated over 3 years ago by Nader Fathy

3 replies • 3641 views
Discussion

Using sampled pxf analysis to simulate deterministic jitter

Category: Custom IC Design

By Frank Wiedmann

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started over 3 years ago

0 replies • 9854 views
Discussion

via array justification?

Category: Custom IC Design

By kenc184

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updated over 3 years ago by Andrew Beckett

3 replies • 9663 views

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