Custom IC Design

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Discussion

Importing layers from GDS inside Virtuoso which are not in the PDK layermap file

Category: Custom IC Design

By sidm

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updated over 2 years ago by sidm

2 replies • 7282 views
Discussion

Two-Stage Op Amp Ideal Vref Help

Category: Custom IC Design

By Tianix

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updated over 2 years ago by ShawnLogan

4 replies • 11455 views
Discussion

Vcres parameters

Category: Custom IC Design

By Reon

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updated over 2 years ago by Andrew Beckett

1 replies • 9608 views
Discussion

Missing connections on the netlist files.

Category: Custom IC Design

By delgsy

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updated over 2 years ago by Andrew Beckett

1 replies • 7959 views
Discussion

Noise analysis shows different transfer function compared with AC or XF analysis

Category: Custom IC Design

By delgsy

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updated over 2 years ago by Andrew Beckett

2 replies • 11019 views
Discussion

error regarding connectLib and its location

Category: Custom IC Design

By delgsy

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updated over 2 years ago by Andrew Beckett

1 replies • 6423 views
Discussion

ams simulation does not work

Category: Custom IC Design

By delgsy

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updated over 2 years ago by Andrew Beckett

3 replies • 7446 views
Discussion

if save/recovery available in ams

Category: Custom IC Design

By sjwprcker

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updated over 2 years ago by ShawnLogan

1 replies • 1168 views
Discussion

Virtuoso virtual connections?

Category: Custom IC Design

By kenc184

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started over 2 years ago

0 replies • 6508 views
Discussion

Boost Converter Design Help

Category: Custom IC Design

By Mamarts

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updated over 2 years ago by ShawnLogan

5 replies • 10024 views
Discussion

Inductor DCR

Category: Custom IC Design

By Mamarts

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updated over 2 years ago by ShawnLogan

1 replies • 6301 views
Discussion

Boost converter Design

Category: Custom IC Design

By Mamarts

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updated over 2 years ago by Mamarts

2 replies • 7546 views
Discussion

How to get the precise time instant of a strobed waveform

Category: Custom IC Design

By sjwprcker

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updated over 2 years ago by sjwprcker

6 replies • 7173 views
Discussion

Changing default height, width and resolution in VIVA Save Image form?

Category: Custom IC Design

By jehh

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updated over 2 years ago by ShawnLogan

6 replies • 8859 views
Discussion

ADE Assembler: Get no evaluation for DC sensitivity analysis

Category: Custom IC Design

By StephanWeber

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updated over 2 years ago by StephanWeber

4 replies • 7582 views

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