Custom IC Design

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Discussion

Transient noise noise_fmax vs. sampling rate

Category: Custom IC Design

By Jere Jarvinen

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updated over 4 years ago by Jere Jarvinen

2 replies • 11994 views
Discussion

What is the meaning of the parent purpose in a LPP?

Category: Custom IC Design

By RVERP

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updated over 4 years ago by RVERP

2 replies • 11216 views
Discussion

How can I get tabular data of I-V current

Category: Custom IC Design

By yysunj

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updated over 4 years ago by Andrew Beckett

1 replies • 10214 views
Discussion

real-time tuning simulation with transient

Category: Custom IC Design

By threepwood06

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updated over 4 years ago by threepwood06

8 replies • 13350 views
Discussion

SpectreMDL sensitivity analysis

Category: Custom IC Design

By mihaiciortuz

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updated over 4 years ago by mihaiciortuz

8 replies • 14360 views
Discussion

Update global variables from active setup to run plan

Category: Custom IC Design

By rod1

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updated over 4 years ago by rod1

3 replies • 12495 views
Discussion

Run plan for running a single test with different variables each time

Category: Custom IC Design

By Ernesto1

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updated over 4 years ago by rod1

3 replies • 12542 views
Discussion

Copied adexl view have a reference to original view's history paths in data.sdb

Category: Custom IC Design

By PatrikOsgnach

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updated over 4 years ago by Danielrayray

6 replies • 4069 views
Discussion

make smaller or hide overlay in Cadence Layout XL

Category: Custom IC Design

By hesaliveJim

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updated over 4 years ago by Andrew Beckett

1 replies • 10676 views
Discussion

NPORT compression "not working"

Category: Custom IC Design

By TommasoF

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updated over 4 years ago by TommasoF

5 replies • 2975 views
Discussion

Terminal is inherited in switch master XXX and not inherited in place master YYY

Category: Custom IC Design

By jjwikner

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updated over 4 years ago by Andrew Beckett

4 replies • 13028 views
Discussion

Resistor Noise Calculation using FFT and Noise Analysis is different

Category: Custom IC Design

By Nader Fathy

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updated over 4 years ago by FormerMember

7 replies • 16684 views
Discussion

Issues in accuracy of clock generation in Verilog-AMS with white noise jitter

Category: Custom IC Design

By RFStuff

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updated over 4 years ago by RFStuff

10 replies • 16994 views
Discussion

How do I set transient strobeoutput to "all" in AMS simulation?

Category: Custom IC Design

By Nader Fathy

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updated over 4 years ago by Nader Fathy

2 replies • 1675 views
Discussion

How to plot the difference of simulation result from Monte carlo and standard simulation?

Category: Custom IC Design

By Martinsh

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updated over 4 years ago by Andrew Beckett

9 replies • 14652 views

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