Custom IC Design

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Discussion

Consistent path to results for corner simulation?

Category: Custom IC Design

By Mike Bichan

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updated over 5 years ago by Andrew Beckett

1 replies • 13238 views
Discussion

How can I place vias with the size exact same cut width without metals around?

Category: Custom IC Design

By BaaB

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updated over 5 years ago by Andrew Beckett

1 replies • 12730 views
Discussion

Cadence virtuoso CDB to OA conversion ( ERROR*loadcontext )

Category: Custom IC Design

By mirtaji65

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updated over 5 years ago by Andrew Beckett

6 replies • 6718 views
Discussion

How to use PSS to determine the output dynamic range ?

Category: Custom IC Design

By Young2020

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updated over 5 years ago by Frank Wiedmann

1 replies • 12851 views
Discussion

Variable Pnoise Stop Frequency

Category: Custom IC Design

By Conorp

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updated over 5 years ago by Frank Wiedmann

5 replies • 15564 views
Discussion

csh C script for automating the ocean simulation

Category: Custom IC Design

By Aksh

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updated over 5 years ago by FormerMember

14 replies • 18084 views
Discussion

How to change default schematic symbol colors

Category: Custom IC Design

By Sutlieff

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updated over 5 years ago by Andrew Beckett

1 replies • 15190 views
Discussion

Symbolic (Analytical) Transfer function from Cadence (XF/PZ) for Simulink modeling

Category: Custom IC Design

By willTspriggs

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updated over 5 years ago by willTspriggs

4 replies • 6004 views
Discussion

VCCAP Usage and Documentation

Category: Custom IC Design

By EEE student

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updated over 5 years ago by EEE student

18 replies • 26070 views
Discussion

Make layout more visible in layout L

Category: Custom IC Design

By BaaB

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updated over 5 years ago by Andrew Beckett

1 replies • 12302 views
Discussion

Can we use $table_model() in verilogAMS

Category: Custom IC Design

By RFStuff

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updated over 5 years ago by Andrew Beckett

3 replies • 13770 views
Discussion

Verilog-A switch model with thermal noise modeling

Category: Custom IC Design

By CatLover

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started over 5 years ago

0 replies • 14593 views
Discussion

Virtuoso 18.1

Category: Custom IC Design

By mooks

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updated over 5 years ago by Andrew Beckett

1 replies • 12706 views
Discussion

How to delete multiple cells in LibManager

Category: Custom IC Design

By HoWei

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updated over 5 years ago by HoWei

2 replies • 15630 views
Discussion

Converting Schematic Testbench Setup into Command Line Spice File(s)?

Category: Custom IC Design

By life

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updated over 5 years ago by Andrew Beckett

1 replies • 1913 views

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