Custom IC Design

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IC5141 on RHEL5 64bit

Category: Custom IC Design

By pyohayo

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updated over 13 years ago by pyohayo

6 replies • 16810 views
Discussion

stubborn VXL markers

Category: Custom IC Design

By linbo

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updated over 13 years ago by Quek

4 replies • 13975 views
Discussion

Questions about OCEAN XL

Category: Custom IC Design

By jorankin

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updated over 13 years ago by stsui

5 replies • 15900 views
Discussion

ASSURA LVS error | Custom Inductor | Pin mismatch | Unbound devices

Category: Custom IC Design

By pitter

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updated over 13 years ago by snaildr

8 replies • 18317 views
Discussion

VCAR V11.2.41.500.6.68 hanging-up on command "route 10"

Category: Custom IC Design

By lawlag02

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updated over 13 years ago by Quek

3 replies • 996 views
Discussion

Assura Rules file debuging

Category: Custom IC Design

By jmoore

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updated over 13 years ago by genieQ

3 replies • 14583 views
Discussion

IC package choice

Category: Custom IC Design

By pyohayo

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updated over 13 years ago by pyohayo

11 replies • 16848 views
Discussion

Wrong AC simulation results with MMSIM10 (IC6.14)

Category: Custom IC Design

By Kabal

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updated over 13 years ago by Quek

1 replies • 12972 views
Discussion

verilog auto-checker search paths

Category: Custom IC Design

By markbeck

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updated over 13 years ago by chrger

3 replies • 14664 views
Discussion

Is there a way to make Cadence point to the error?

Category: Custom IC Design

By tony4tony

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updated over 13 years ago by linbo

7 replies • 18178 views
Discussion

MC string read out

Category: Custom IC Design

By Josef

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started over 13 years ago

0 replies • 12793 views
Discussion

The way to build my own capacitors/resistors

Category: Custom IC Design

By DWalter

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started over 13 years ago

0 replies • 794 views
Discussion

set design variables in ADE XL

Category: Custom IC Design

By nzborsti

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updated over 13 years ago by nzborsti

2 replies • 16185 views
Discussion

TAP cell in 28nm Kit

Category: Custom IC Design

By cupidsd

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updated over 13 years ago by Quek

3 replies • 15226 views
Discussion

ERROR (OSSHNL-116): Unable to descend into any of the views defined in the view list, 'spectre cmos_sch cmos.sch schematic veriloga'

Category: Custom IC Design

By Usman001

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updated over 13 years ago by Usman001

2 replies • 8690 views

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