Custom IC Design

Latest Posts

Discussion

Where is SMG "schematic model generator“ in IC618

Category: Custom IC Design

By SpiceMonkey

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 1080 views
Discussion

B1f and K in sp Analysis

Category: Custom IC Design

By illaoi

$usertype
•
updated over 2 years ago by ShawnLogan

1 replies • 6996 views
Discussion

How to copy designs to different machines?

Category: Custom IC Design

By Doronzzz

$usertype
•
updated over 2 years ago by ShawnLogan

3 replies • 7295 views
Discussion

ADE: Need a trick for plotting result values vs corners

Category: Custom IC Design

By StephanWeber

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 5890 views
Discussion

"Fixed Parameter" option in "Detail - Transpose" Virtuoso results display - unexpected behavior

Category: Custom IC Design

By shlomo34

$usertype
•
updated over 2 years ago by shlomo34

1 replies • 1635 views
Discussion

Limiting the length of a vector in VIVA

Category: Custom IC Design

By CSCNalu

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 5675 views
Discussion

How to set fluid guard ring contact size as rectangle

Category: Custom IC Design

By TonyTang

$usertype
•
started over 2 years ago

0 replies • 5441 views
Discussion

ADE Reliability analysis: Also for XF and DCMatch?

Category: Custom IC Design

By StephanWeber

$usertype
•
updated over 2 years ago by StephanWeber

2 replies • 5914 views
Discussion

bindKeys file "< Key > R5"

Category: Custom IC Design

By alaylayla

$usertype
•
started over 2 years ago

0 replies • 566 views
Discussion

Sweeping one parameter in only one test for ADE XL

Category: Custom IC Design

By NickSJ1196

$usertype
•
updated over 2 years ago by ShawnLogan

2 replies • 6068 views
Discussion

transient noise simulation

Category: Custom IC Design

By analog2

$usertype
•
updated over 2 years ago by ShawnLogan

5 replies • 7205 views
Discussion

Importing layers from GDS inside Virtuoso which are not in the PDK layermap file

Category: Custom IC Design

By sidm

$usertype
•
updated over 2 years ago by sidm

2 replies • 6868 views
Discussion

Two-Stage Op Amp Ideal Vref Help

Category: Custom IC Design

By Tianix

$usertype
•
updated over 2 years ago by ShawnLogan

4 replies • 10709 views
Discussion

Vcres parameters

Category: Custom IC Design

By Reon

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 9085 views
Discussion

Missing connections on the netlist files.

Category: Custom IC Design

By delgsy

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 7628 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.