Custom IC Design

Latest Posts

Discussion

How do I set transient strobeoutput to "all" in AMS simulation?

Category: Custom IC Design

By Nader Fathy

$usertype
•
updated over 4 years ago by Nader Fathy

2 replies • 1679 views
Discussion

How to plot the difference of simulation result from Monte carlo and standard simulation?

Category: Custom IC Design

By Martinsh

$usertype
•
updated over 4 years ago by Andrew Beckett

9 replies • 14671 views
Discussion

VIVA zoom horizontal/vertical

Category: Custom IC Design

By amacSS

$usertype
•
updated over 4 years ago by amacSS

2 replies • 1764 views
Discussion

Bad value "primary" for parameter - Characterising cells using Liberate

Category: Custom IC Design

By iamKarthikBK

$usertype
•
started over 4 years ago

0 replies • 1426 views
Discussion

import a Spice Model in a schematic

Category: Custom IC Design

By Friedrich

$usertype
•
updated over 4 years ago by Friedrich

3 replies • 23104 views
Discussion

Connecting PMOS body to VSS! in Layout XL

Category: Custom IC Design

By Demi

$usertype
•
updated over 4 years ago by Quek

1 replies • 19588 views
Discussion

"the following branches form a loop of rigid branches"

Category: Custom IC Design

By Jose Sarmento

$usertype
•
updated over 4 years ago by Jose Sarmento

2 replies • 3340 views
Discussion

VerilogA $limit with spectre

Category: Custom IC Design

By camilloS

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 10582 views
Discussion

Using variables with spectrumMeas

Category: Custom IC Design

By Rob Gregoire

$usertype
•
started over 4 years ago

0 replies • 10112 views
Discussion

Automatically Export Spectre AMS-Output-Data

Category: Custom IC Design

By FloPro

$usertype
•
updated over 4 years ago by FloPro

2 replies • 11328 views
Discussion

ddt() at a certain timestep in Verilog-A

Category: Custom IC Design

By rhanna

$usertype
•
updated over 4 years ago by Andrew Beckett

11 replies • 16310 views
Discussion

Layout XL generating MOS without source contacts.

Category: Custom IC Design

By hesaliveJim

$usertype
•
updated over 4 years ago by henker

2 replies • 11855 views
Discussion

Is there a way to exclude vias when highlighting nets using Net Tracer on Virtuoso?

Category: Custom IC Design

By Tom Sawyer

$usertype
•
started over 4 years ago

0 replies • 10126 views
Discussion

can analog pad be used as power pad (power is ac sinosuid)

Category: Custom IC Design

By Her1

$usertype
•
updated over 4 years ago by Her1

6 replies • 11941 views
Discussion

HB Analysis on PLL

Category: Custom IC Design

By fortune100worse

$usertype
•
updated over 4 years ago by Andrew Beckett

20 replies • 23798 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.