• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
CDNS - double leaderboard script

Custom IC Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    IC617 layout slow in VNC

    Category: Custom IC Design

    By drdanmc

    $usertype

    •

    updated over 8 years ago by Andrew Beckett

    1 replies • 14123 views
  • Discussion

    String variable as node name in mdl file?

    Category: Custom IC Design

    By ikara

    $usertype

    •

    started over 8 years ago

    0 replies • 12941 views
  • Discussion

    Nested equations in ADEL

    Category: Custom IC Design

    By CorradoN

    $usertype

    •

    updated over 8 years ago by drdanmc

    2 replies • 14500 views
  • Discussion

    Plot PM versus a swept parameter using parametric analysis

    Category: Custom IC Design

    By AmeliAmeli

    $usertype

    •

    updated over 8 years ago by Andrew Beckett

    1 replies • 13400 views
  • Discussion

    ADEXL parallel tests

    Category: Custom IC Design

    By manoharbn

    $usertype

    •

    updated over 8 years ago by Andrew Beckett

    1 replies • 14461 views
  • Discussion

    Pnoise analysis

    Category: Custom IC Design

    By Jithin

    $usertype

    •

    updated over 8 years ago by Andrew Beckett

    8 replies • 21982 views
  • Discussion

    Invalid probe for a .measure statement where node also exist as port in one hierarchy above

    Category: Custom IC Design

    By roopakvasa

    $usertype

    •

    updated over 8 years ago by Andrew Beckett

    1 replies • 13523 views
  • Discussion

    LVS shows "StampErrorMult" error

    Category: Custom IC Design

    By Anklon

    $usertype

    •

    updated over 8 years ago by Andrew Beckett

    1 replies • 5678 views
  • Discussion

    Simulation model for floating gate

    Category: Custom IC Design

    By farhan89

    $usertype

    •

    updated over 8 years ago by paritoshs24

    1 replies • 14143 views
  • Discussion

    Cadence Variables setup

    Category: Custom IC Design

    By AllenD

    $usertype

    •

    updated over 8 years ago by drdanmc

    1 replies • 19297 views
  • Discussion

    Design based on Nangate 15nm OCL in cadence virtuoso environment

    Category: Custom IC Design

    By Carmichaeli

    $usertype

    •

    updated over 8 years ago by Andrew Beckett

    5 replies • 15136 views
  • Discussion

    Not able to interface spectre data with Matlab

    Category: Custom IC Design

    By Abhishek D

    $usertype

    •

    updated over 8 years ago by RaffaeleCapoccia

    8 replies • 17362 views
  • Discussion

    Assura DRC deck in PVS.

    Category: Custom IC Design

    By mhkvy4

    $usertype

    •

    updated over 8 years ago by mhkvy4

    8 replies • 17531 views
  • Discussion

    vcvs Impedance Dips in Frequency

    Category: Custom IC Design

    By ChrisDG

    $usertype

    •

    updated over 8 years ago by ChrisDG

    4 replies • 18421 views
  • Discussion

    Noise Simulation of DAC+VCO

    Category: Custom IC Design

    By Nitesh Tripathi

    $usertype

    •

    updated over 8 years ago by Nitesh Tripathi

    1 replies • 1262 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information