Custom IC Design

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Discussion

Reconciling phase-noise obtained using pss+pnoise analysis with that obtained using transient noise and PN() function

Category: Custom IC Design

By taer

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updated over 4 years ago by taer

4 replies • 6339 views
Discussion

A good way to track license usage per user-id and hours ?

Category: Custom IC Design

By HoWei

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updated over 4 years ago by HoWei

2 replies • 14514 views
Discussion

How can I change several tests on Assembler simultaneously?

Category: Custom IC Design

By BillH314

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updated over 4 years ago by BillH314

2 replies • 12542 views
Discussion

1 dB compression point cannot be get when using montecarlo in ADE XL

Category: Custom IC Design

By Went

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updated over 4 years ago by Went

4 replies • 12759 views
Discussion

deepprobe gives error when probing: --- WARNING (SPECTRE-8281): `p0' is not a node nor an instance name.

Category: Custom IC Design

By Mike Bichan

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updated over 4 years ago by Mike Bichan

1 replies • 2085 views
Discussion

Monte Carlo - RAM usage issue, run each point consecutively?

Category: Custom IC Design

By michael10

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updated over 4 years ago by michael10

3 replies • 2378 views
Discussion

Print Noise Summary after Pnoise Simulation(timedomain)

Category: Custom IC Design

By charlieWu

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updated over 4 years ago by charlieWu

5 replies • 2801 views
Discussion

Batch export of parasitic values in nets

Category: Custom IC Design

By CSCNalu

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updated over 4 years ago by CSCNalu

2 replies • 11799 views
Discussion

scaling layout

Category: Custom IC Design

By MReza Mah

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updated over 4 years ago by Andrew Beckett

1 replies • 13858 views
Discussion

FreePDK45 usage in Virtuoso

Category: Custom IC Design

By kevin998x

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updated over 4 years ago by Andrew Beckett

10 replies • 24826 views
Discussion

use sweep and montecarlo at the same time

Category: Custom IC Design

By Went

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updated over 4 years ago by Andrew Beckett

3 replies • 11936 views
Discussion

Consistent path to results for corner simulation?

Category: Custom IC Design

By Mike Bichan

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updated over 4 years ago by Andrew Beckett

1 replies • 12217 views
Discussion

How can I place vias with the size exact same cut width without metals around?

Category: Custom IC Design

By BaaB

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updated over 4 years ago by Andrew Beckett

1 replies • 11840 views
Discussion

Cadence virtuoso CDB to OA conversion ( ERROR*loadcontext )

Category: Custom IC Design

By mirtaji65

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updated over 4 years ago by Andrew Beckett

6 replies • 6022 views
Discussion

How to use PSS to determine the output dynamic range ?

Category: Custom IC Design

By Young2020

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updated over 4 years ago by Frank Wiedmann

1 replies • 11948 views

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