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Custom IC Design

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  • Discussion

    Transient Noise Analysis (fmin)

    Category: Custom IC Design

    By em1rk

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    updated over 1 year ago by Andrew Beckett

    3 replies • 5129 views
  • Discussion

    Difference srrWave and drWave

    Category: Custom IC Design

    By tsnv

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    updated over 1 year ago by Andrew Beckett

    1 replies • 3820 views
  • Discussion

    Refer to output expression by name, when name contains whitespaces and special characters

    Category: Custom IC Design

    By Volker T

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    updated over 1 year ago by Volker T

    2 replies • 4062 views
  • Discussion

    VSR: How to avoid router to route over floating fill

    Category: Custom IC Design

    By MARTH0401

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    updated over 1 year ago by RobMan

    4 replies • 4255 views
  • Discussion

    Plotting Template in ADE Assembler and ADE Explorer

    Category: Custom IC Design

    By IceTea

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    started over 1 year ago

    0 replies • 3476 views
  • Discussion

    Transient Noise Simulation in Cadence Virtuoso

    Category: Custom IC Design

    By Maria98

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    updated over 1 year ago by Andrew Beckett

    2 replies • 4916 views
  • Discussion

    How to inquire the discipline of a specific net in an AMS simulation via systemVerilog

    Category: Custom IC Design

    By Pedro P

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    updated over 1 year ago by Andrew Beckett

    1 replies • 4025 views
  • Discussion

    Evaluated waveform discontinuity

    Category: Custom IC Design

    By sidm

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    updated over 1 year ago by sidm

    6 replies • 4847 views
  • Discussion

    VSR not dropping vias to short all pins

    Category: Custom IC Design

    By MARTH0401

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    •

    updated over 1 year ago by RobMan

    5 replies • 4624 views
  • Discussion

    Maestro - custom window size for simulation log

    Category: Custom IC Design

    By firebolt3

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    updated over 1 year ago by Andrew Beckett

    4 replies • 1399 views
  • Discussion

    Adapt .cal file to .rul file for PVS

    Category: Custom IC Design

    By Joan Serrano

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    updated over 1 year ago by Joan Serrano

    4 replies • 4586 views
  • Discussion

    Maestro - dark theme background

    Category: Custom IC Design

    By firebolt3

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    updated over 1 year ago by Andrew Beckett

    1 replies • 1179 views
  • Discussion

    How to merge top cell with dummy metal GDS

    Category: Custom IC Design

    By Moin0513

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    started over 1 year ago

    0 replies • 3747 views
  • Discussion

    One testbench for different analysis (S-parameters, ac, transient)

    Category: Custom IC Design

    By engmsalik321

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    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 4040 views
  • Discussion

    Setting a routing only master instance transparent

    Category: Custom IC Design

    By JtiendraS

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    •

    updated over 1 year ago by Andrew Beckett

    3 replies • 4011 views
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