Custom IC Design

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Discussion

Master file is missing from schematic

Category: Custom IC Design

By FormerMember

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updated over 7 years ago by FormerMember

2 replies • 7377 views
Discussion

Parameters Sweep in ADE-XL results in "netl err"

Category: Custom IC Design

By akak

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updated over 7 years ago by akak

8 replies • 8713 views
Discussion

Queue list in job policies of ADE

Category: Custom IC Design

By anoopvk

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updated over 7 years ago by Andrew Beckett

3 replies • 15841 views
Discussion

Parsevals theorem

Category: Custom IC Design

By itos

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updated over 7 years ago by Andrew Beckett

2 replies • 13611 views
Discussion

Long symbol label expressions disrupting Zoom to Fit

Category: Custom IC Design

By CADcasualty

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updated over 7 years ago by Andrew Beckett

3 replies • 14074 views
Discussion

How is the netlisting done in ADE

Category: Custom IC Design

By anoopvk

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updated over 7 years ago by Andrew Beckett

1 replies • 13926 views
Discussion

need document regarding voltage sources and it usage (vdc, vpulse..etc)

Category: Custom IC Design

By AARORA

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updated over 7 years ago by Andrew Beckett

1 replies • 13906 views
Discussion

ADE XL Job Policy Setup -> Max. Jobs - automatic set after start

Category: Custom IC Design

By AndreyVolk

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updated over 7 years ago by AndreyVolk

1 replies • 4861 views
Discussion

noise analysis during transient

Category: Custom IC Design

By nicola91it

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updated over 7 years ago by nicola91it

2 replies • 13638 views
Discussion

[IC6.1.7] Simulating VHDL-AMS

Category: Custom IC Design

By LukiLeu

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updated over 7 years ago by LukiLeu

2 replies • 14642 views
Discussion

What is the difference between the $PATH variables?

Category: Custom IC Design

By AndreyVolk

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updated over 7 years ago by AndreyVolk

2 replies • 6724 views
Discussion

variable $freq in veriloga

Category: Custom IC Design

By RobinCommander

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updated over 7 years ago by Frank Wiedmann

6 replies • 17838 views
Discussion

saving results with same net names of two different cells

Category: Custom IC Design

By EngrZM

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updated over 7 years ago by Andrew Beckett

3 replies • 13844 views
Discussion

Number of accepted tran steps in spectre log

Category: Custom IC Design

By anoopvk

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updated over 7 years ago by Andrew Beckett

1 replies • 14168 views
Discussion

Modifying an extracted view for post layout simulation.

Category: Custom IC Design

By ghrshomali

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updated over 7 years ago by Bruce A

16 replies • 24403 views

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