Custom IC Design

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Discussion

License server

Category: Custom IC Design

By Milt

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updated over 8 years ago by Marc Heise

1 replies • 14327 views
Discussion

Pins are not annotated using subcircuit (netlist)

Category: Custom IC Design

By Johanny Saenz

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updated over 8 years ago by Johanny Saenz

4 replies • 15440 views
Discussion

Measure DNL/INL in ADE-XL

Category: Custom IC Design

By migrg

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updated over 8 years ago by migrg

1 replies • 8907 views
Discussion

dft error with a valid transient waveform

Category: Custom IC Design

By Aldo2

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updated over 8 years ago by Aldo2

4 replies • 14819 views
Discussion

Problem in importing verilog netlist to cadence

Category: Custom IC Design

By Casp

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started over 8 years ago

0 replies • 13719 views
Discussion

Verilog-A, one time execution function

Category: Custom IC Design

By samer1

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updated over 8 years ago by samer1

6 replies • 20928 views
Discussion

scs files

Category: Custom IC Design

By samer1

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updated over 8 years ago by Quek

6 replies • 25794 views
Discussion

Exporting ADE-L Variables

Category: Custom IC Design

By netbug

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updated over 8 years ago by netbug

6 replies • 14842 views
Discussion

unwanted snapping in layout editor

Category: Custom IC Design

By huadel

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updated over 8 years ago by Andrew Beckett

1 replies • 16147 views
Discussion

Using DC operating point calculated from spectre in APS Simualtion over Corners

Category: Custom IC Design

By Johanny Saenz

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started over 8 years ago

0 replies • 13523 views
Discussion

What is license feature "Virtuoso_Spectre_GXL_MMSIM_Lk", and how to use it?

Category: Custom IC Design

By dontpanic

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updated over 8 years ago by dontpanic

2 replies • 3806 views
Discussion

stb and tran analysis discrepancy

Category: Custom IC Design

By FormerMember

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updated over 8 years ago by FormerMember

1 replies • 1447 views
Discussion

[Solved] Unbound pins when running Assura LVS in Virtuoso Layout Suite L

Category: Custom IC Design

By dpalomeq

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updated over 8 years ago by dpalomeq

8 replies • 21577 views
Discussion

ADE: Use of nested design variables in output expressions

Category: Custom IC Design

By sommer

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updated over 8 years ago by Andrew Beckett

3 replies • 16634 views
Discussion

Access simulation data with OCEAN command getResult() / method description of classType famLeafAnalysis

Category: Custom IC Design

By sommer

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started over 8 years ago

0 replies • 13118 views

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