Custom IC Design

Latest Posts

Discussion

Pnoise vs Transient noise

Category: Custom IC Design

By Haoyi219

$usertype
•
updated over 5 years ago by Haoyi219

2 replies • 18759 views
Discussion

Pass veriloga parameter to parameters in ADE XL

Category: Custom IC Design

By JakobToft

$usertype
•
updated over 5 years ago by JakobToft

4 replies • 18281 views
Discussion

How to measure the performance of a PLL ?

Category: Custom IC Design

By JJJin

$usertype
•
started over 5 years ago

0 replies • 13264 views
Discussion

Dynamic temperature variation of a SPECIFIC component during transient simulation

Category: Custom IC Design

By Quantum7

$usertype
•
updated over 5 years ago by Andrew Beckett

3 replies • 15679 views
Discussion

Using DFT to analyze a time-interleaving track and hold circuit

Category: Custom IC Design

By YutaoLiu

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 14104 views
Discussion

How do make the clock 25% duty cycle with jitter capability

Category: Custom IC Design

By cADEUser

$usertype
•
updated over 5 years ago by Andrew Beckett

4 replies • 16975 views
Discussion

How to generate a clock signal with random noise in Cadence Spectre?

Category: Custom IC Design

By BackerShu

$usertype
•
updated over 5 years ago by Andrew Beckett

3 replies • 28963 views
Discussion

Method to scale up or down lots of resistor/capacitor value together

Category: Custom IC Design

By FormerMember

$usertype
•
updated over 5 years ago by henker

1 replies • 2293 views
Discussion

Mixed-signal CDL netlist export

Category: Custom IC Design

By Nicolas Callens

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 15127 views
Discussion

LDO design and simulation

Category: Custom IC Design

By SHATADAL IIITG

$usertype
•
started over 5 years ago

0 replies • 13929 views
Discussion

Smooth dynamic parameter variation in transient sim

Category: Custom IC Design

By Quantum7

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 15011 views
Discussion

Plotting temperature in a transient simulation

Category: Custom IC Design

By Quantum7

$usertype
•
updated over 5 years ago by Quantum7

9 replies • 20545 views
Discussion

Pin placement does not show up

Category: Custom IC Design

By Nicolas Callens

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 14015 views
Discussion

How to fix "*WARNING* file /home/Kaveri/CDS.log Malformed Lock-Stake file.", when running virtuoso?

Category: Custom IC Design

By Marben

$usertype
•
updated over 5 years ago by Marben

2 replies • 9398 views
Discussion

Is CDL netlist *.PININFO pin1:O pin2:I pin3:IO property a syntax requirement?

Category: Custom IC Design

By max123321

$usertype
•
updated over 5 years ago by Andrew Beckett

3 replies • 3318 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.