Custom IC Design

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Discussion

Regarding including .sp file in cdl

Category: Custom IC Design

By skillEater

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updated over 5 years ago by Andrew Beckett

1 replies • 14768 views
Discussion

How to know the END of a Spectre Simulation fired in the Linux terminal.

Category: Custom IC Design

By RFStuff

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updated over 5 years ago by RFStuff

2 replies • 14672 views
Discussion

verilogA encryption for spectre

Category: Custom IC Design

By Fabb

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updated over 5 years ago by Amar Kumar

13 replies • 22719 views
Discussion

convert schematics or simulation results to PDF

Category: Custom IC Design

By tyanata

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updated over 5 years ago by John Barth

20 replies • 26137 views
Discussion

pnoise_pmjitter missing when running sweeps

Category: Custom IC Design

By Martin Cochet

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updated over 5 years ago by Andrew Beckett

5 replies • 15763 views
Discussion

LVS Error

Category: Custom IC Design

By RakeshPRG

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started over 5 years ago

0 replies • 14446 views
Discussion

Maximum resistance of the lines

Category: Custom IC Design

By rafaelon

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started over 5 years ago

0 replies • 13292 views
Discussion

Error when opening library in Abstract Generator

Category: Custom IC Design

By MSP032

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updated over 5 years ago by Andrew Beckett

1 replies • 14051 views
Discussion

Modeling a transmission line using the mclin element

Category: Custom IC Design

By velosat

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updated over 5 years ago by Andrew Beckett

1 replies • 15112 views
Discussion

Monte Carlo Simulation: Global+Local vs Local and Process vs Mismatch

Category: Custom IC Design

By yayla

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updated over 5 years ago by HoWei

9 replies • 59471 views
Discussion

purpose of file "sp.noise.sp"

Category: Custom IC Design

By Ymmen

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updated over 5 years ago by Ymmen

2 replies • 2159 views
Discussion

Assura LVS Parameter Mismatch Error

Category: Custom IC Design

By tonyinbos

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updated over 5 years ago by MADag

14 replies • 26293 views
Discussion

Two part functional symbol in Virtuoso

Category: Custom IC Design

By svuser

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updated over 5 years ago by Andrew Beckett

1 replies • 13946 views
Discussion

Define libraries as read-only

Category: Custom IC Design

By HoWei

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updated over 5 years ago by HoWei

4 replies • 18026 views
Discussion

Plot analog bus with non-overlayed traces in ViVa

Category: Custom IC Design

By HoWei

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updated over 5 years ago by HoWei

10 replies • 19115 views

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