Custom IC Design

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Discussion

Transient Current Noise vs AC current noise

Category: Custom IC Design

By JHansrani

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updated over 6 years ago by Andrew Beckett

2 replies • 13863 views
Discussion

Using vcvs as delay elements result in period signal rising and falling time changing

Category: Custom IC Design

By xianweng

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updated over 6 years ago by Andrew Beckett

2 replies • 15538 views
Discussion

How to add a probe color of choice in schematic Editor

Category: Custom IC Design

By RFStuff

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updated over 6 years ago by Andrew Beckett

1 replies • 15702 views
Discussion

How I can declare a thermodecoder variable in a vcd file

Category: Custom IC Design

By georgekasa

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updated over 6 years ago by Andrew Beckett

1 replies • 13326 views
Discussion

Label inside a clone

Category: Custom IC Design

By RVERP

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updated over 6 years ago by Andrew Beckett

4 replies • 14152 views
Discussion

Capturing data transition time stamp of the a Wave viewed in SimVision

Category: Custom IC Design

By RFStuff

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updated over 6 years ago by Andrew Beckett

3 replies • 16542 views
Discussion

Calculate DNL of a DAC in Cadence

Category: Custom IC Design

By HasanAr

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updated over 6 years ago by HasanAr

2 replies • 19135 views
Discussion

Error coming up when trying to do DRC and Extraction in CADENCE with AMS design kit

Category: Custom IC Design

By vaishakprathap

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updated over 6 years ago by vaishakprathap

2 replies • 13737 views
Discussion

Input Capacitance Characterization in Cadence Liberate

Category: Custom IC Design

By anurans

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updated over 6 years ago by anurans

26 replies • 31425 views
Discussion

RF Jitter, parametric sweep in ADE L

Category: Custom IC Design

By wsamples01

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started over 6 years ago

0 replies • 12985 views
Discussion

load annotation setup

Category: Custom IC Design

By bid75

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updated over 6 years ago by Andrew Beckett

1 replies • 13840 views
Discussion

VIVA: possible to change thickness of gridlines?

Category: Custom IC Design

By dontpanic

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updated over 6 years ago by Andrew Beckett

1 replies • 13592 views
Discussion

ASSEMBLER: possible to export tests as ADE-L states?

Category: Custom IC Design

By dontpanic

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updated over 6 years ago by Andrew Beckett

5 replies • 17653 views
Discussion

Layout XL - switch drain and source of a transistor with multiple fingers

Category: Custom IC Design

By FormerMember

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started over 6 years ago

0 replies • 2401 views
Discussion

Maestro MTS-Option - how to set different reltol for different subckts?

Category: Custom IC Design

By Sergej Scherer

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updated over 6 years ago by Andrew Beckett

1 replies • 1369 views

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