Custom IC Design

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. dot vs / slash when saving signals in Ocean

Category: Custom IC Design

By zaratustra

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updated over 5 years ago by zaratustra

2 replies • 14632 views
Discussion

Different Extracted Capacitance Values of the Same MOM Cap Structures Obtained from Quantus QRC Filed Solver

Category: Custom IC Design

By baltacican87

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updated over 5 years ago by Frank Wiedmann

3 replies • 16252 views
Discussion

Help!!, Spectre error: Illegal library definition found in netlist for TSMC 180nm

Category: Custom IC Design

By Omar Alngar

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updated over 5 years ago by Omar Alngar

2 replies • 17247 views
Discussion

Wrong Constraint Values in Sequential Cell Characterization

Category: Custom IC Design

By anurans

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updated over 5 years ago by anurans

6 replies • 16461 views
Discussion

Importing a capacitor interactive model from manufacturer

Category: Custom IC Design

By KhalidEissa

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updated over 5 years ago by KhalidEissa

2 replies • 16502 views
Discussion

Design variable in assember -> copy from cell view issue

Category: Custom IC Design

By sjwprc

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updated over 5 years ago by sjwprc

4 replies • 4517 views
Discussion

Frequency blocks within a sub-cell troubles

Category: Custom IC Design

By itos

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updated over 5 years ago by pepijndevos

1 replies • 13963 views
Discussion

Can't Find Quantus QRC toolbar on the Layout Suite

Category: Custom IC Design

By Danielrayray

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updated over 5 years ago by Danielrayray

3 replies • 3617 views
Discussion

Layout can't open with the following warning message in CIW

Category: Custom IC Design

By Danielrayray

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updated over 5 years ago by Danielrayray

2 replies • 3141 views
Discussion

Simulating PSSR+/PSSR- and CMRR

Category: Custom IC Design

By wgtkan

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updated over 5 years ago by wgtkan

2 replies • 12916 views
Discussion

Using calcVal() in Monte-Carlo simulations

Category: Custom IC Design

By Yannis79

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updated over 5 years ago by Yannis79

2 replies • 16885 views
Discussion

convert ircx to ict or emDataFile for Voltus-fi

Category: Custom IC Design

By huqy

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updated over 5 years ago by Andrew Beckett

1 replies • 15635 views
Discussion

Unable to Import .v files with `define using "Cadence Verilog In" tool

Category: Custom IC Design

By Nader Fathy

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updated over 5 years ago by Nader Fathy

3 replies • 5443 views
Discussion

how to add section info to extsim_model_include?

Category: Custom IC Design

By chaujohnthan

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updated over 5 years ago by chaujohnthan

10 replies • 15875 views
Discussion

Regarding Save/Restore Settings for Transient Simulation

Category: Custom IC Design

By Kiel76

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updated over 5 years ago by FormerMember

3 replies • 4424 views

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