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Custom IC Design

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  • Discussion

    How can I place vias with the size exact same cut width without metals around?

    Category: Custom IC Design

    By BaaB BaaB

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 11678 views
  • Discussion

    Cadence virtuoso CDB to OA conversion ( ERROR*loadcontext )

    Category: Custom IC Design

    By mirtaji65 mirtaji65

    •

    updated over 4 years ago by Andrew Beckett

    6 replies • 5865 views
  • Discussion

    How to use PSS to determine the output dynamic range ?

    Category: Custom IC Design

    By Young2020 Young2020

    •

    updated over 4 years ago by Frank Wiedmann

    1 replies • 11783 views
  • Discussion

    Variable Pnoise Stop Frequency

    Category: Custom IC Design

    By Conorp Conorp

    •

    updated over 4 years ago by Frank Wiedmann

    5 replies • 14305 views
  • Discussion

    csh C script for automating the ocean simulation

    Category: Custom IC Design

    By Aksh Aksh

    •

    updated over 4 years ago by FormerMember

    14 replies • 15931 views
  • Discussion

    How to change default schematic symbol colors

    Category: Custom IC Design

    By Sutlieff Sutlieff

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 13908 views
  • Discussion

    Symbolic (Analytical) Transfer function from Cadence (XF/PZ) for Simulink modeling

    Category: Custom IC Design

    By willTspriggs willTspriggs

    •

    updated over 4 years ago by willTspriggs

    4 replies • 5349 views
  • Discussion

    VCCAP Usage and Documentation

    Category: Custom IC Design

    By EEE student EEE student

    •

    updated over 4 years ago by EEE student

    18 replies • 23256 views
  • Discussion

    Make layout more visible in layout L

    Category: Custom IC Design

    By BaaB BaaB

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 11318 views
  • Discussion

    Can we use $table_model() in verilogAMS

    Category: Custom IC Design

    By RFStuff RFStuff

    •

    updated over 4 years ago by Andrew Beckett

    3 replies • 12583 views
  • Discussion

    Verilog-A switch model with thermal noise modeling

    Category: Custom IC Design

    By CatLover CatLover

    •

    started over 4 years ago

    0 replies • 13326 views
  • Discussion

    Virtuoso 18.1

    Category: Custom IC Design

    By mooks mooks

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 11668 views
  • Discussion

    How to delete multiple cells in LibManager

    Category: Custom IC Design

    By HoWei HoWei

    •

    updated over 4 years ago by HoWei

    2 replies • 14327 views
  • Discussion

    Converting Schematic Testbench Setup into Command Line Spice File(s)?

    Category: Custom IC Design

    By life life

    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 1656 views
  • Discussion

    Importing corner setup from CSV with double quotes

    Category: Custom IC Design

    By Mike Bichan Mike Bichan

    •

    updated over 4 years ago by Mike Bichan

    4 replies • 12553 views
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