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Custom IC Design

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  • Discussion

    Latest Ruler in a layout window

    Category: Custom IC Design

    By JackPro

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    updated over 9 years ago by Andrew Beckett

    9 replies • 16243 views
  • Discussion

    Cadence ADE L Calculator and the expression used

    Category: Custom IC Design

    By Pyroblast

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    updated over 9 years ago by Andrew Beckett

    3 replies • 15336 views
  • Discussion

    Time Variable Resistor

    Category: Custom IC Design

    By Ahmed Taha

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    updated over 9 years ago by Andrew Beckett

    7 replies • 22039 views
  • Discussion

    Is there a way to measure the equivalent capacitance from a node to ground in a circuit?

    Category: Custom IC Design

    By BaaB

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    updated over 9 years ago by Andrew Beckett

    7 replies • 24068 views
  • Discussion

    Assura LVS using: setenv OA_UNSUPPORTED_PLAT linux_rhel40_gcc44x

    Category: Custom IC Design

    By bartman

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    updated over 9 years ago by Quek

    10 replies • 16223 views
  • Discussion

    Array manipulation in calculator

    Category: Custom IC Design

    By manudupouy

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    updated over 9 years ago by manudupouy

    3 replies • 15933 views
  • Discussion

    A divide by zero exception in connect_lib

    Category: Custom IC Design

    By twen

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    updated over 9 years ago by Andrew Beckett

    1 replies • 13742 views
  • Discussion

    DRD compactor versus stdcells

    Category: Custom IC Design

    By danmc91

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    started over 9 years ago

    0 replies • 13095 views
  • Discussion

    ELC : Simulation status : FAIL during db_spice

    Category: Custom IC Design

    By Hemal93

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    updated over 9 years ago by Hemal93

    6 replies • 14676 views
  • Discussion

    How to flatten layout cells and preserve pin names when pin names from different cells are the same

    Category: Custom IC Design

    By twen

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    updated over 9 years ago by Andrew Beckett

    10 replies • 19885 views
  • Discussion

    Issues with pin connectivity in Layout

    Category: Custom IC Design

    By DavideP

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    updated over 9 years ago by DavideP

    2 replies • 24911 views
  • Discussion

    Error in Calibre LVS

    Category: Custom IC Design

    By srihari18

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    updated over 9 years ago by Andrew Beckett

    1 replies • 16746 views
  • Discussion

    Run multiple ADE of the same schematic at the same time.

    Category: Custom IC Design

    By BaaB

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    updated over 9 years ago by BaaB

    4 replies • 16601 views
  • Discussion

    ELC Error: Redefinition of the subckt

    Category: Custom IC Design

    By Hemal93

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    updated over 9 years ago by Hemal93

    2 replies • 14249 views
  • Discussion

    abstract generator: LEF does not contain ANTENNAGATEAREA

    Category: Custom IC Design

    By jsundermeyer

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    updated over 9 years ago by jsundermeyer

    2 replies • 15394 views
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