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Custom IC Design

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  • Discussion

    deselect when zoom to unconnected net?

    Category: Custom IC Design

    By linbo linbo

    •

    updated over 14 years ago by linbo

    2 replies • 13076 views
  • Discussion

    viewing the simulation results with viewer in cadence

    Category: Custom IC Design

    By Hazo Hazo

    •

    updated over 14 years ago by Andrew Beckett

    1 replies • 13340 views
  • Discussion

    turning off VXL connectivity in non VXL context

    Category: Custom IC Design

    By linbo linbo

    •

    updated over 14 years ago by Andrew Beckett

    1 replies • 12999 views
  • Discussion

    Simulation with MATLAB generated data file as input to Anagol block

    Category: Custom IC Design

    By Analog Design Analog Design

    •

    updated over 14 years ago by Andrew Beckett

    3 replies • 13752 views
  • Discussion

    About function define

    Category: Custom IC Design

    By bobbygang bobbygang

    •

    updated over 14 years ago by bobbygang

    6 replies • 15029 views
  • Discussion

    turning off Illegal Weak-Connect check in VXL

    Category: Custom IC Design

    By linbo linbo

    •

    updated over 14 years ago by Quek

    1 replies • 14605 views
  • Discussion

    Abstract Generator Crash!!

    Category: Custom IC Design

    By eklikeroomys eklikeroomys

    •

    updated over 14 years ago by Andrew Beckett

    3 replies • 13497 views
  • Discussion

    Rulers as Objects

    Category: Custom IC Design

    By Apes Apes

    •

    updated over 14 years ago by Andrew Beckett

    4 replies • 14193 views
  • Discussion

    Command openResults problem

    Category: Custom IC Design

    By loon loon

    •

    updated over 14 years ago by Andrew Beckett

    1 replies • 13166 views
  • Discussion

    Regarding behavioural modelling of analog design

    Category: Custom IC Design

    By Analog Design Analog Design

    •

    updated over 14 years ago by Analog Design

    2 replies • 13157 views
  • Discussion

    hiSubEventShell() what is that?

    Category: Custom IC Design

    By fomin fomin

    •

    updated over 14 years ago by skillUser

    1 replies • 13011 views
  • Discussion

    How to plot my own data in cadence

    Category: Custom IC Design

    By loon loon

    •

    updated over 14 years ago by loon

    3 replies • 15688 views
  • Discussion

    How to do analog modeling with verilog -A

    Category: Custom IC Design

    By Analog Design Analog Design

    •

    updated over 14 years ago by Andrew Beckett

    1 replies • 516 views
  • Discussion

    resistor pcell legs

    Category: Custom IC Design

    By Roughy Roughy

    •

    updated over 14 years ago by Andrew Beckett

    1 replies • 13044 views
  • Discussion

    Mark Net Configuration

    Category: Custom IC Design

    By TjaartOpperman TjaartOpperman

    •

    updated over 14 years ago by Adrian Nistor

    4 replies • 14817 views
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