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Digital Implementation

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  • Discussion

    RC extraction mode for postRoute timing analysis

    Category: Digital Implementation

    By archive archive

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    updated over 18 years ago by archive

    3 replies • 14716 views
  • Discussion

    BUffer Profiling

    Category: Digital Implementation

    By archive archive

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    updated over 18 years ago by archive

    3 replies • 15553 views
  • Discussion

    About Encounter 'Split Long Via', how to make it work?

    Category: Digital Implementation

    By archive archive

    •

    started over 18 years ago

    0 replies • 5292 views
  • Discussion

    get rid of 'WARN' & 'ERRORS' after design import

    Category: Digital Implementation

    By archive archive

    •

    updated over 18 years ago by archive

    7 replies • 7555 views
  • Discussion

    Low Power Tip of the Week: Decap cells

    Category: Digital Implementation

    By archive archive

    •

    updated over 18 years ago by archive

    2 replies • 13652 views
  • Discussion

    Get Boundary Flops list ?

    Category: Digital Implementation

    By archive archive

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    updated over 18 years ago by archive

    5 replies • 14151 views
  • Discussion

    Multi Supply Voltage tip of the week

    Category: Digital Implementation

    By archive archive

    •

    started over 18 years ago

    0 replies • 12812 views
  • Discussion

    Different OpCond for different libraries

    Category: Digital Implementation

    By archive archive

    •

    updated over 18 years ago by archive

    3 replies • 14319 views
  • Discussion

    order of cell list

    Category: Digital Implementation

    By archive archive

    •

    updated over 18 years ago by archive

    1 replies • 12899 views
  • Discussion

    Libgen Detailed Power View Models

    Category: Digital Implementation

    By archive archive

    •

    updated over 18 years ago by archive

    1 replies • 13174 views
  • Discussion

    power domain information compatability

    Category: Digital Implementation

    By archive archive

    •

    started over 18 years ago

    0 replies • 12571 views
  • Discussion

    design.io assignment file generation.

    Category: Digital Implementation

    By archive archive

    •

    updated over 18 years ago by archive

    3 replies • 16269 views
  • Discussion

    Problem with addWellTap command

    Category: Digital Implementation

    By archive archive

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    updated over 18 years ago by archive

    2 replies • 16066 views
  • Discussion

    Get all register related to ONE clock?

    Category: Digital Implementation

    By archive archive

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    updated over 18 years ago by archive

    5 replies • 15520 views
  • Discussion

    Local congestion with 6.1*?

    Category: Digital Implementation

    By archive archive

    •

    updated over 18 years ago by archive

    4 replies • 14020 views
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