Digital Implementation

Latest Posts

Discussion

senthesize sub-module

Category: Digital Implementation

By designer

$usertype
•
started over 17 years ago

0 replies • 13316 views
Discussion

soc encounter output to Magic

Category: Digital Implementation

By Renee

$usertype
•
updated over 17 years ago by Renee

4 replies • 14103 views
Discussion

First Encounter pin placement/layer

Category: Digital Implementation

By archive

$usertype
•
updated over 17 years ago by Kari

9 replies • 8848 views
Discussion

Number of Non Equivalence Points after comparison in LEC Conformal

Category: Digital Implementation

By Azhar

$usertype
•
updated over 17 years ago by Azhar

1 replies • 15376 views
Discussion

Encounter/Nanoroute - fixing DRC violations while keeping critical pre-routes untouched

Category: Digital Implementation

By ccabal

$usertype
•
updated over 17 years ago by ccabal

4 replies • 5734 views
Discussion

Disable clock gating check for a module.

Category: Digital Implementation

By Tongju

$usertype
•
started over 17 years ago

0 replies • 16243 views
Discussion

How to stream in Verilog to Virtuoso using "Retain reference library (No Merge)"

Category: Digital Implementation

By naderi

$usertype
•
updated over 17 years ago by BobD

3 replies • 2854 views
Discussion

Power estimation after synthesis and Place-&-route

Category: Digital Implementation

By naderi

$usertype
•
started over 17 years ago

0 replies • 895 views
Discussion

about dbgGPSAutoCellFunction

Category: Digital Implementation

By archive

$usertype
•
updated over 17 years ago by tarekray

5 replies • 14655 views
Discussion

Encounter doesn't find pgpin in the power pad

Category: Digital Implementation

By archive

$usertype
•
updated over 17 years ago by admin

1 replies • 924 views
Discussion

No matching .SUBCKT statement error in LVS check

Category: Digital Implementation

By archive

$usertype
•
updated over 17 years ago by archive

8 replies • 22278 views
Discussion

db command to return cell PG pin layer shape

Category: Digital Implementation

By archive

$usertype
•
started over 17 years ago

0 replies • 13176 views
Discussion

power planning for AMS design

Category: Digital Implementation

By archive

$usertype
•
started over 17 years ago

0 replies • 13126 views
Discussion

Clock Tree Latency Calculation Difference between reportClockTree & report_timing

Category: Digital Implementation

By archive

$usertype
•
updated over 17 years ago by archive

4 replies • 11209 views
Discussion

About GCELLGRID and TRACK Statement in DEF

Category: Digital Implementation

By archive

$usertype
•
updated over 17 years ago by archive

5 replies • 16805 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.