Functional Verification

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Discussion

Hierarchical Coverage

Category: Functional Verification

By Umar Farooq

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started over 11 years ago

0 replies • 13462 views
Discussion

Where can I get the equivalent circuit of device model?

Category: Functional Verification

By youngdd

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started over 11 years ago

0 replies • 13479 views
Discussion

Square Wave as input signal

Category: Functional Verification

By Pavan Garate

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updated over 11 years ago by oldmouldy

1 replies • 22508 views
Discussion

vManager Failed: Unexpected error ( Out of memory )

Category: Functional Verification

By JennyYang

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updated over 11 years ago by JennyYang

4 replies • 18147 views
Discussion

INCISIV132/122 does not support some systemverilog 2012 coverage coding

Category: Functional Verification

By JennyYang

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updated over 11 years ago by StephenH

2 replies • 1069 views
Discussion

Does irun 12.20 support multi-core simulation and how to do so

Category: Functional Verification

By JennyYang

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updated over 11 years ago by JennyYang

4 replies • 17511 views
Discussion

How to suppress these three mem_error/warning/abnormal transition messages

Category: Functional Verification

By usha sudhagar

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started over 11 years ago

0 replies • 1109 views
Discussion

query on scope of events in e language

Category: Functional Verification

By jaichandra

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updated over 11 years ago by jaichandra

2 replies • 14222 views
Discussion

How to suppress the warning -- ASSERT/WARNING (time 277932200 PS) from package ieee.NUMERIC_STD

Category: Functional Verification

By usha sudhagar

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updated over 11 years ago by muffi

1 replies • 7006 views
Discussion

Promlem with markers

Category: Functional Verification

By Mozak

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started over 11 years ago

0 replies • 14272 views
Discussion

ADE L Outputs Window does not work

Category: Functional Verification

By hoorayitsjohn

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updated over 11 years ago by StephenH

1 replies • 14605 views
Discussion

UVC Source Synchronous Interface

Category: Functional Verification

By rlanier

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updated over 11 years ago by StephenH

1 replies • 14160 views
Discussion

ICCR: toggle exclude for bits of a bus

Category: Functional Verification

By Cadence Forum

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updated over 11 years ago by StephenH

9 replies • 18917 views
Discussion

net connectivity at the top level using TCL

Category: Functional Verification

By freitas

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updated over 11 years ago by freitas

2 replies • 14419 views
Discussion

Capture project conversion

Category: Functional Verification

By Mael LM

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updated over 11 years ago by oldmouldy

1 replies • 14323 views

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