• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Hardware/Software Co-Development, Verification…
CDNS - double leaderboard script

Hardware/Software Co-Development, Verification and Integration

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    digital simulation of an FPGA

    Category: Hardware/Software Co-Development, Verification and Integration

    By bdatta bdatta

    •

    started over 16 years ago

    0 replies • 12745 views
  • Discussion

    non-linear transformer in PSpice

    Category: Hardware/Software Co-Development, Verification and Integration

    By JohnCross JohnCross

    •

    started over 16 years ago

    0 replies • 13628 views
  • Discussion

    bias point blowup in pspice 9.1 (demo)

    Category: Hardware/Software Co-Development, Verification and Integration

    By ke0ff ke0ff

    •

    updated over 16 years ago by ke0ff

    2 replies • 13597 views
  • Discussion

    ncelab: *F,INTERR: INTERNAL ERROR while running ncsc_run on a systemC & verilog design

    Category: Hardware/Software Co-Development, Verification and Integration

    By Shailendra Shailendra

    •

    updated over 16 years ago by Mickey

    3 replies • 1710 views
  • Discussion

    Elaborating the design hierarchy

    Category: Hardware/Software Co-Development, Verification and Integration

    By TIRTH TIRTH

    •

    updated over 16 years ago by TIRTH

    1 replies • 13618 views
  • Discussion

    Mix-Singal system verification using VHDL and Verilog-AMS, pls help

    Category: Hardware/Software Co-Development, Verification and Integration

    By lagy lagy

    •

    updated over 16 years ago by TIRTH

    1 replies • 13276 views
  • Discussion

    cross talk effect

    Category: Hardware/Software Co-Development, Verification and Integration

    By surajece01 surajece01

    •

    started over 16 years ago

    0 replies • 12745 views
  • Discussion

    backannotation in a hierarchical design

    Category: Hardware/Software Co-Development, Verification and Integration

    By thescreen thescreen

    •

    started over 16 years ago

    0 replies • 12781 views
  • Discussion

    cannot run simvision

    Category: Hardware/Software Co-Development, Verification and Integration

    By bdatta bdatta

    •

    updated over 16 years ago by Mickey

    1 replies • 13944 views
  • Discussion

    Verilog-XL install

    Category: Hardware/Software Co-Development, Verification and Integration

    By bdatta bdatta

    •

    started over 16 years ago

    0 replies • 13293 views
  • Discussion

    what is the link to download older version of IUS? Thanks

    Category: Hardware/Software Co-Development, Verification and Integration

    By lagy lagy

    •

    updated over 16 years ago by aplumb

    1 replies • 13463 views
  • Discussion

    About the object value of system verilog in ncsim

    Category: Hardware/Software Co-Development, Verification and Integration

    By Rex Chen Rex Chen

    •

    updated over 16 years ago by Rex Chen

    1 replies • 13681 views
  • Discussion

    how to update ECO

    Category: Hardware/Software Co-Development, Verification and Integration

    By ARUNKUMAR ARUNKUMAR

    •

    updated over 16 years ago by Khurana

    1 replies • 13112 views
  • Discussion

    psm

    Category: Hardware/Software Co-Development, Verification and Integration

    By Raam Raam

    •

    updated over 16 years ago by ARUNKUMAR

    1 replies • 13117 views
  • Discussion

    HOW TO UPDATE ECO

    Category: Hardware/Software Co-Development, Verification and Integration

    By ARUNKUMAR ARUNKUMAR

    •

    started over 16 years ago

    0 replies • 12664 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information