Hardware/Software Co-Development, Verification and Integration

Latest Posts

Discussion

Fixed step size

Category: Hardware/Software Co-Development, Verification and Integration

By TLIG
•
updated over 12 years ago by TLIG

2 replies • 14305 views
Discussion

Error when copying cells or libraries in the library manager: DFIIChecker / gdmExec

Category: Hardware/Software Co-Development, Verification and Integration

By watermelon
•
started over 12 years ago

0 replies • 13949 views
Discussion

How to automatically sort/rename parts in schematic?

Category: Hardware/Software Co-Development, Verification and Integration

By Pompo
•
updated over 12 years ago by Pompo

3 replies • 6599 views
Discussion

Error voltage failed to converge

Category: Hardware/Software Co-Development, Verification and Integration

By elquesea
•
updated over 12 years ago by elquesea

2 replies • 17489 views
Discussion

Pspice Advanced : SMOKE. Different smoke limits per Model

Category: Hardware/Software Co-Development, Verification and Integration

By Dami
•
updated over 12 years ago by Alok Tripathi

7 replies • 16530 views
Discussion

Pspice encrypted model doesn't work but the non-encrypted model works fine

Category: Hardware/Software Co-Development, Verification and Integration

By Moduser
•
updated over 12 years ago by Moduser

2 replies • 3213 views
Discussion

DC sweep

Category: Hardware/Software Co-Development, Verification and Integration

By abhierao
•
started over 12 years ago

0 replies • 12653 views
Discussion

How to plot current versus voltage curve in waveform graph XL with cadence 6.1.4

Category: Hardware/Software Co-Development, Verification and Integration

By MathieuM
•
updated over 12 years ago by abhierao

1 replies • 18071 views
Discussion

Multiple Design Available -Cadence Compiler Error!

Category: Hardware/Software Co-Development, Verification and Integration

By venky27
•
started over 12 years ago

0 replies • 1620 views
Discussion

Help needed for generating random signals in cadence analog lib

Category: Hardware/Software Co-Development, Verification and Integration

By pprv2013
•
started over 12 years ago

0 replies • 13188 views
Discussion

HOWTO - CtoS - Identify Write Ops(Specify Micro-architecture) in Source Code?

Category: Hardware/Software Co-Development, Verification and Integration

By Ahmad Obeid
•
updated over 12 years ago by Ahmad Obeid

2 replies • 1475 views
Discussion

SystemC sc_method schedule

Category: Hardware/Software Co-Development, Verification and Integration

By jxker
•
updated over 12 years ago by Ahmad Obeid

1 replies • 13826 views
Discussion

Limits on CSV export of traces?

Category: Hardware/Software Co-Development, Verification and Integration

By freefood89
•
started over 12 years ago

0 replies • 12738 views
Discussion

Regarding Coverage excluding a module

Category: Hardware/Software Co-Development, Verification and Integration

By Mohan P
•
updated over 12 years ago by hellohi

4 replies • 21634 views
Discussion

need solution for following error in cadence RTL synthesis tool

Category: Hardware/Software Co-Development, Verification and Integration

By aathi27
•
updated over 12 years ago by StephenH

1 replies • 13578 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.