Logic Design

Latest Posts

Discussion

Clock gating cells constraints

Category: Logic Design

By archive

$usertype
•
started over 19 years ago

0 replies • 14452 views
Discussion

RTL compiler: Port names expansion of record types in vhdl synthesis

Category: Logic Design

By archive

$usertype
•
updated over 19 years ago by archive

2 replies • 15387 views
Discussion

How to get the latest information about Conformal?

Category: Logic Design

By archive

$usertype
•
started over 19 years ago

0 replies • 13335 views
Discussion

questions on custom digital IC design

Category: Logic Design

By archive

$usertype
•
started over 19 years ago

0 replies • 13606 views
Discussion

How FEV saved our STA

Category: Logic Design

By archive

$usertype
•
updated over 19 years ago by archive

2 replies • 14871 views
Discussion

CDNLive! papers/presentations - excerpts/pointers for FV topics

Category: Logic Design

By archive

$usertype
•
started over 19 years ago

0 replies • 824 views
Discussion

reading synthesized design

Category: Logic Design

By archive

$usertype
•
updated over 19 years ago by archive

3 replies • 14962 views
Discussion

RC compiler issue with vlog2001

Category: Logic Design

By archive

$usertype
•
updated over 19 years ago by archive

1 replies • 13981 views
Discussion

Reading Netlists with SEQGEN primitive

Category: Logic Design

By archive

$usertype
•
updated over 19 years ago by archive

2 replies • 16131 views
Discussion

timing reports in rc

Category: Logic Design

By archive

$usertype
•
updated over 19 years ago by archive

2 replies • 14191 views
Discussion

DC to RTL Compiler Equivalency Commands

Category: Logic Design

By archive

$usertype
•
updated over 19 years ago by archive

1 replies • 14230 views
Discussion

Share your learnings, paper reviews comments from CNDLive!

Category: Logic Design

By archive

$usertype
•
started over 19 years ago

0 replies • 13323 views
Discussion

NCELAB sdf-annotate warning W*,SDFNMX

Category: Logic Design

By archive

$usertype
•
updated over 19 years ago by archive

3 replies • 6183 views
Discussion

Are you coming to CDNLive

Category: Logic Design

By archive

$usertype
•
started over 19 years ago

0 replies • 13291 views
Discussion

CDNLive Silicon Valley 2006

Category: Logic Design

By archive

$usertype
•
started over 19 years ago

0 replies • 13283 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.