• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design

PCB Design

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

PCB Design

Latest Posts

  • Create a new Post
  • Discussion

    DRC Errors with Copper pour

    Category: PCB Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 12179 views
  • Discussion

    CROSS REF FOR HIERARCHICAL DESIGNS

    Category: PCB Design

    By archive archive

    •

    updated over 18 years ago by archive

    10 replies • 15877 views
  • Discussion

    Swapping Out Padstacks .....

    Category: PCB Design

    By archive archive

    •

    updated over 18 years ago by archive

    1 replies • 12318 views
  • Discussion

    Reg: Watermarking methods for printed circuit boards

    Category: PCB Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 12257 views
  • Discussion

    Watermark in Printed Circuit boards

    Category: PCB Design

    By archive archive

    •

    updated over 18 years ago by archive

    2 replies • 14443 views
  • Discussion

    Long Reference Designators

    Category: PCB Design

    By archive archive

    •

    updated over 18 years ago by archive

    3 replies • 13071 views
  • Discussion

    Allegro DRC issues once again

    Category: PCB Design

    By archive archive

    •

    updated over 18 years ago by archive

    4 replies • 13327 views
  • Discussion

    PCI Express card outline board symbol

    Category: PCB Design

    By archive archive

    •

    updated over 18 years ago by archive

    2 replies • 14211 views
  • Discussion

    Modeling and Simulating Line-Interface IOs of Communications Chips

    Category: PCB Design

    By archive archive

    •

    updated over 18 years ago by archive

    3 replies • 12763 views
  • Discussion

    Thermal Pad Shape with vias

    Category: PCB Design

    By archive archive

    •

    updated over 18 years ago by archive

    2 replies • 14410 views
  • Discussion

    CDNLive Early Bird Registration Ends August 26th

    Category: PCB Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 11969 views
  • Discussion

    Post Processing - Gerber Links to Layers Spreadsheet

    Category: PCB Design

    By archive archive

    •

    updated over 18 years ago by archive

    1 replies • 738 views
  • Discussion

    Skew calculations

    Category: PCB Design

    By archive archive

    •

    updated over 18 years ago by archive

    3 replies • 15086 views
  • Discussion

    Layout to PCB Editor

    Category: PCB Design

    By archive archive

    •

    updated over 18 years ago by archive

    4 replies • 12746 views
  • Discussion

    Complex LED Footprint

    Category: PCB Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 12526 views
<>
Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information