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    Double placing components from Capture 17.4 in to Orcad PCB Designer 17.4 - 2019 S002 0

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    3 replies
    Latest over 6 years ago
    by steve
  • Discussion

    allegro schematic Hierarchy Locked

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    0 replies
    Started over 6 years ago
    by abdul000
  • Discussion

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    2 replies
    Latest over 6 years ago
    by leto
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    S2P file format Locked

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    Started over 6 years ago
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    What is SPIF stand for ? Locked

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    1 reply
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    by DavidJHutchins
  • Discussion

    DRC flag Red after creating VCC shape plane

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    by Cailloux
  • Discussion

    Is it possible to delete an only one rastnet instead "delete all" in allegro 16.6? Locked

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    1 reply
    Latest over 6 years ago
    by Dennisco
  • Discussion

    Is it normal that allegro 16.6 "add connect" action doesn't allow drawing track paths as you want? Locked

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    1 reply
    Latest over 6 years ago
    by joma
  • Discussion

    Issue with step file export

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    3 replies
    Latest over 6 years ago
    by steve
  • Discussion

    How to handle "unconnected pins" when they are apparently connected throught copper tracks?

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    Latest over 6 years ago
    by EuSV
  • Not Answered

    Error: PXL failed. Unable to package the design. 0

    16472 views
    2 replies
    Latest over 6 years ago
    by TomChen1228
  • Discussion

    Enable Undo/Redo in Part Editor Locked

    3502 views
    1 reply
    Latest over 6 years ago
    by TheNewb2
  • Discussion

    Inconsistent behaviour of warn() between Virtuoso and Allegro

    15328 views
    0 replies
    Started over 6 years ago
    by TobiasMrks
  • Discussion

    how to lock alias in page view Locked

    13960 views
    1 reply
    Latest over 6 years ago
    by tennywhy
  • Discussion

    Extend Rigid-Flex!!! Locked

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    1 reply
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