• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List
  • Discussion

    Is irregular shape LEF possible? Locked

    15568 views
    5 replies
    Latest over 15 years ago
    by Alex Soyer
  • Discussion

    Identify unrouted nets Locked

    19283 views
    8 replies
    Latest over 15 years ago
    by stellar
  • Discussion

    Same Net DRC for Stagged (Burried) vias Locked

    13169 views
    1 reply
    Latest over 15 years ago
    by Helen
  • Discussion

    can anybody help me for Cadence 6.1 on Ubuntu 9.10 setp by setp Locked

    16335 views
    6 replies
    Latest over 15 years ago
    by amirzahedi
  • Discussion

    Backannotating mirror info from Allegro to Capture... Locked

    13045 views
    2 replies
    Latest over 15 years ago
    by Helen
  • Discussion

    Challenges with running Transient simulation on Spectre Locked

    15138 views
    2 replies
    Latest over 15 years ago
    by besafoli
  • Discussion

    Cadence 6.1 problem Locked

    14819 views
    4 replies
    Latest over 15 years ago
    by Andrew Beckett
  • Discussion

    workaround for encounter gui mouse behavior issue Locked

    13893 views
    3 replies
    Latest over 15 years ago
    by abraun
  • Discussion

    Is it necessary to have set_load and set_drive in SDC file, when IO libary is used for P&R Locked

    3565 views
    2 replies
    Latest over 15 years ago
    by Greatrebel
  • Discussion

    Modelling the connectors for SI Analysis-163 Locked

    13042 views
    3 replies
    Latest over 15 years ago
    by Khurana
  • Discussion

    Orcad PCB Designer - Place manual Locked

    1920 views
    2 replies
    Latest over 15 years ago
    by Tory1
  • Discussion

    moving rect/polygon with respect to source and destination point? Locked

    1761 views
    2 replies
    Latest over 15 years ago
    by Prabhu The ICL
  • Discussion

    Long startup for simulations using ADE-XL Locked

    18227 views
    6 replies
    Latest over 15 years ago
    by vivkr
  • Discussion

    DRC for ht mismatch in Allegro PCB-163 Locked

    14867 views
    7 replies
    Latest over 15 years ago
    by steve
  • Discussion

    IC6.1.4 layout editor L - read only - still need license feature 111 Locked

    1199 views
    1 reply
    Latest over 15 years ago
    by Quek
<>

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information