• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List
  • Discussion

    DRC Error Using Assura Locked

    12528 views
    3 replies
    Latest over 4 years ago
    by Andrew Beckett
  • Discussion

    global pins Locked

    9424 views
    0 replies
    Started over 4 years ago
    by abdurrahman0234
  • Discussion

    Are there any rules and techniques for setting the accuracy and step length when performing transient simulation of unstable systems (that is, the transfer function has RHP) in Spectre? Locked

    13105 views
    2 replies
    Latest over 4 years ago
    by zuiying
  • Not Answered

    CIS Explorer 0

    13315 views
    2 replies
    Latest over 4 years ago
    by hirelhkh
  • Discussion

    How to change pin number view on Allegro Pacakage BGA pins?

    20495 views
    11 replies
    Latest over 4 years ago
    by excellon1
  • Discussion

    10Gbs Signal Integrity and IBIS files and simulation Locked

    9529 views
    0 replies
    Started over 4 years ago
    by atoddrich
  • Discussion

    How to create a RMB menu in explorer ? Locked

    11582 views
    5 replies
    Latest over 4 years ago
    by Pierre Bordere
  • Discussion

    Spectre gives different DC simulation results for the same circuit (even some results don't satisfy KCL) Locked

    3367 views
    2 replies
    Latest over 4 years ago
    by zuiying
  • Discussion

    DC Annotation works sometimes and does not other times Locked

    11749 views
    4 replies
    Latest over 4 years ago
    by greywanderer
  • Discussion

    Virtuoso layout hierarchical copy contains mysterious residue from other libraries Locked

    13588 views
    7 replies
    Latest over 4 years ago
    by chenyanw
  • Discussion

    xmvlog warning: *W,DUPATR duplicate attribute name (trans) Locked

    2252 views
    1 reply
    Latest over 4 years ago
    by StephenH
  • Discussion

    skip=cut inst=[...] statements being ignored Locked

    1869 views
    3 replies
    Latest over 4 years ago
    by Andrew Beckett
  • Discussion

    Virtuoso Error Locked

    12816 views
    6 replies
    Latest over 4 years ago
    by Andrew Beckett
  • Discussion

    Printing out unconventional process-specific model parameter in ADE Locked

    12072 views
    6 replies
    Latest over 4 years ago
    by MReza123
  • Discussion

    ams XCELIUM simulation pauses Locked

    14398 views
    7 replies
    Latest over 4 years ago
    by amifsud
<>

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information