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Featured

DesignCon 2025 Highlights and Papers on Demand

The Cadence MSA team had a GREAT DesignCon highlighting how Cadence can help you…

MSATeam
• 2 min read
featured , DesignCon , Advanced IC packaging , PCB design

Designing High-Performance Sensor Packages to Ensure Optimized Performance

In an era where technology and connectivity reign supreme, electronic, and mechanical…

Vinod Khera
• 4 min read
featured , IC Packaging , Allegro X Design Platform , EDA , MCAD-ECAD

Machine Learning Is Revolutionizing IBIS-AMI Optimization in High-Speed Design

The complexity of IBIS-AMI models used in simulating serial links has increased to…

MSATeam
• 1 min read
featured
System, PCB, & Package Design 

Latest blogs

Customer Support Recommended—Modeling Voltage-Controlled Oscillators (VCO) Using…

A voltage-controlled oscillator (VCO) is an electronic oscillator whose oscillation…

• 2 min read
AMS , Allegro 16.6 , Allegro 16.5 , PSPICE , PCB design , SPB16.5

What's Good About OrCAD Capture’s Customization Capabilities? 16.6 has Several New…

The 16.6 release of OrCAD Capture/Capture-CIS provides several areas for you to customize…

• 2 min read
OrCAD Capture , 16.6 , Capture CIS , Grzenia , Schematic

What's Good About Allegro PCB Editor Vertically Placed Components? It’s in the 16…

The ‘dual_sided_component’ property in the Allegro PCB Editor 16.6 release can be…

• 1 min read
embedded components , interconnects , Allegro 16.6 , PCB design , Allegro PCB Editor

What's Good About Allegro PCB Editor Select by Lasso or Path? 16.6 Has It!

The 16.6 Allegro PCB Editor release contains two new selection options, lasso and…

• 1 min read
PCB , PCB Layout and routing , Allegro GUI , Allegro 16.6 , cadence , Routing , route quality , bulk editing , SPB , PCB Editor , PCB design , Allegro PCB Editor

Multi-Fabric Planning for Efficient PCB Design

Recently, an article was published in Printed Circuit Design and Fab about Multi…

• 1 min read
BGA-style package , PCB design , multi-fabric planning , pin assignment

Do You Design Wafer-Level Chip-Scale Packages? Cadence 16.6 SiP Layout Makes Your…

As these types of designs see an increasing number of applications and design starts…

• 4 min read
IC Package , SiP Design , Co-Design , layout pin numbering

What's Good About Using Sigrity and Cadence SiP Digital to Reduce Design Costs? Check…

This week, you can view a couple of videos where customers describe how they used…

• 1 min read
SiP , Digital SiP design , Power Integrity , Layout , Signal Integrity , PCB design , Sigrity

What's Good About Allegro PCB Editor Artwork Film Capabilities? 16.6 Has Several…

The 16.6 Allegro PCB Editor release contains several enhancement to the Artwork Film…

• 1 min read
PCB , PCB Layout and routing , Allegro GUI , Allegro 16.6 , artwork , SPB , PCB Editor , Layout , design , PCB design , Allegro PCB Editor , Allegro

What's Good About Allegro PCB Editor New Slide Capabilities? 16.6 has Several New…

The 16.6 Allegro PCB Editor release's new ‘Slide’ command utilizes a move-intersect…

• 8 min read
PCB , PCB Layout and routing , interconnects , Allegro GUI , Allegro 16.6 , cadence , Routing , DRC , Placement Edit , diff pair , SPB , PCB Editor , High-Density Interconnect , Layout , Allegro router , PCB design , Spacing , Allegro PCB Editor

What's Good About Allegro PCB Editor Move Lines/Text to Different Classes? Check…

Beginning with the 16.6 Allegro PCB Editor release, lines and text can now be moved…

• 1 min read
PCB , Allegro 16.6 , SPB , PCB Editor , Layout , Grzenia , Allegro PCB Editor

What's Good About Capture’s Design Rule Checks? 16.6 Has Several New Enhancements…

The Allegro Design Entry CIS (OrCAD Capture) 16.6 release provides extensions to…

• 1 min read
Design Rule Checker , Allegro 16.6 , Design Entry CIS , DRC , 16.6 , Capture CIS , SPB , OrCAD

Have a Complex, Off-Grid Pin Pattern to Number? Cadence Allegro16.6 IC Package Design…

Complex dies with a mixture of digital and analog circuitry means equally complex…

• 4 min read
IC Packaging and SiP Design , IC Packaging , IC packaging SiP Layout , SiP Design , Digital SiP design , IC Packaging and SiP , layout pin numbering , IC packaging documentation , pin numbering , SiP Layout

Customer Support Recommended – Using Test Points in Allegro Design Entry CIS and…

A test point is a location within an electronic circuit that is used to either monitor…

• 4 min read
Design Entry CIS , OrCAD Capture Marketplace , Capture CIS , PCB Editor , Constraint Manager , PCB design , test point , Allegro PCB Editor , OrCAD PCB Editor , Schematic , Allegro

Create Ideal Solder Mask Openings Around Bond Fingers with Cadence 16.6 IC Packaging…

Exposing metal through solder mask openings is as necessary as it can be frustrating…

• 4 min read
IC Packaging and SiP Design , SiP , IC Packaging , SiP Design , IC package design , package design rules , Wirebond , SiP Layout , wire bond

What's Good About Allegro Design Workbench Team Collaboration? Find Out in the 16…

The Allegro Design Workbench Team Design Option (TDO) offers two (2) specific integrator…

• 1 min read
PCB , Cadence Design Systems , Allegro 16.6 , cadence , 16.6 , Allegro Design Workbench , Team design , SPB , design , PCB design , Grzenia , ADW

DDR4 Power-Aware Signal Integrity Adopting Serial Link Simulation Techniques

The signal integrity (SI) prophets had predicted this time would come, and it turns…

• 4 min read
Serial link analysis , DDR4 , BER Analysis , SystemSI , Power aware SI , Allegro Sigrity

What's Good About Allegro DEHDL Net Renaming? The Secret's in the 16.6 Release!

Just a brief post this week to mention a new capability for Allegro Design Entry…

• less than a min read
Allegro Design Entry , Allegro 16.6 , 16.6 , SPB , Design Entry HDL , PCB design , Design Entry

Strengthen Your Plane-to-Plane Connections with Cadence 16.6 IC Package Shorting…

Manufacturability and quality of the power and ground feeds for your package are…

• 2 min read
SiP , IC Package , 16.6 , APD , package design , Allegro Package Designer

What's Good About Allegro PCB Editor Multiple Constraint Region Assignments? 16.6…

Just a short post today. In the 16.6 Allegro PCB Editor release, multiple region…

• less than a min read
constraint region , Allegro 16.6 , SPB , PCB Editor , BGA , Layout

What's Good About Allegro PCB Editor Dual-Side Contact Components? It’s in the 16…

The use of dual-sided contact components when placed on internal layers of the PCB…

• 3 min read
PCB Layout and routing , Allegro GUI , inset vias , Allegro 16.6 , Routing , staggered vias , layer stacks , SPB , PCB Editor , PCB routing , Layout , via , PCB design , Allegro PCB Editor , buried vias , HDI , PCB Capture

What's Good About Allegro PCB Editor Design Partitioning? 16.6 Has Several New Enhancements

The 16.6 release of Allegro PCB Editor has several new enhancements for team design…

• 3 min read
Allegro 16.6 , 16.6 , Team design , SPB , PCB Editor , Constraint Manager , Allegro PCB Editor

What's Good About Allegro PCB Editor IPC 2581 Data Transfer Standard? 16.6 Has It

The 16.6 Allegro PCB Editor now has IPC 2581 data transfer capabilities. Thanks to…

• 10 min read
PCB , PCB Layout and routing , Cadence Design Systems , Allegro GUI , Allegro 16.6 , cadence , 16.6 , layer stacks , artwork , SPB , interfaces , PCB Editor , Layout , design , PCB design , Grzenia , Allegro PCB Editor , Standards based Interfaces , Allegro

Build Components Quickly and Easily with Pre-Defined Escape Routing Using Cadence…

When it comes to designing a dense flip-chip die - or even defining a BGA for a complex…

• 5 min read
Allegro package design , reusable tiles , EDA , package design , SiP Layout , substrate design tools

What's Good About Allegro PCB Editor Offset Routing? 16.6 Has a Few New Enhancements

The Add Connect with Offset command in Allegro PCB Editor 16.6 is designed to primarily…

• 4 min read
Routing , signal grouping , 16.6 , SPB , PCB Editor , differential pair , Layout , group routing , Allegro

What's Good About Allegro PCB Editor Show Measure for Dual Units? 16.6 Has It!

The Allegro PCB Editor 16.6 ‘Show Measure’ command now displays results in database…

• 1 min read
PCB , PCB Layout and routing , Allegro GUI , Allegro 16.6 , Routing , electrical constraints , SPB , PCB Editor , Layout , design , PCB design , physical layout design , Allegro PCB Editor , PCB Capture , Allegro

Add a View of Your Package Substrate in Your IC Layout Tool for Maximum Design Context…

We have all heard about co-design, how it is going to get us to market on time, reduce…

• 4 min read
SiP , Allegro Package Designer , IC packaging documentation , APD 16.6 , SiP Layout

What's Good About Allegro AMS Simulator PSpice Model Encryption? It’s in the 16.6…

With the 16.6 Allegro AMS Simulator (PSpice) release, you now have a new AES 256…

• less than a min read
AMS , Allegro 16.6 , AMS simulator , Allegro AMS , PSPICE , AMS simulation , model editor

What's Good About Capture’s Auto Part Reference? 16.6 has a Few New Enhancements

The 16.6 release of OrCAD Capture has a couple new productivity enhancements centered…

• less than a min read
capture , Cadence Design Systems , Allegro Design Entry , Design Entry CIS , cadence , Allegro Design Entry CIS , AMS simulator , OrCAD Capture , 16.6 , Capture CIS , Capture-CIS , OrCAD , PCB design , Design Entry , Grzenia , PCB Capture , Schematic
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